[llvm] r334109 - [Hexagon] Split CTPOP of vector pairs

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Wed Jun  6 11:03:29 2018
New Revision: 334109

URL: http://llvm.org/viewvc/llvm-project?rev=334109&view=rev
Log:
[Hexagon] Split CTPOP of vector pairs

Added:
    llvm/trunk/test/CodeGen/Hexagon/autohvx/ctpop-split.ll
Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp?rev=334109&r1=334108&r2=334109&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp Wed Jun  6 11:03:29 2018
@@ -1457,6 +1457,7 @@ HexagonTargetLowering::LowerHvxOperation
       case ISD::LOAD:
       case ISD::STORE:
         return SplitHvxMemOp(Op, DAG);
+      case ISD::CTPOP:
       case ISD::CTLZ:
       case ISD::CTTZ:
       case ISD::MUL:

Added: llvm/trunk/test/CodeGen/Hexagon/autohvx/ctpop-split.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/autohvx/ctpop-split.ll?rev=334109&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/autohvx/ctpop-split.ll (added)
+++ llvm/trunk/test/CodeGen/Hexagon/autohvx/ctpop-split.ll Wed Jun  6 11:03:29 2018
@@ -0,0 +1,26 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; Check if popcounts of vector pairs are properly split.
+
+; CHECK-LABEL: f0:
+; CHECK: v0.h = vpopcount(v0.h)
+; CHECK: v1.h = vpopcount(v1.h)
+define <64 x i16> @f0(<64 x i16> %a0) #0 {
+  %t0 = call <64 x i16> @llvm.ctpop.v64i32(<64 x i16> %a0)
+  ret <64 x i16> %t0
+}
+
+; CHECK-LABEL: f1:
+; CHECK: v0.h = vpopcount(v0.h)
+; CHECK: v1.h = vpopcount(v1.h)
+define <128 x i16> @f1(<128 x i16> %a0) #1 {
+  %t0 = call <128 x i16> @llvm.ctpop.v128i32(<128 x i16> %a0)
+  ret <128 x i16> %t0
+}
+
+declare <64 x i16>  @llvm.ctpop.v64i32(<64 x i16>) #0
+declare <128 x i16>  @llvm.ctpop.v128i32(<128 x i16>) #1
+
+attributes #0 = { readnone nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b,-packets" }
+attributes #1 = { readnone nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b,-packets" }
+