[llvm] r334105 - Change TII isCopyInstr way of returning arguments(NFC)
Petar Jovanovic via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 6 09:36:30 PDT 2018
Author: petarj
Date: Wed Jun 6 09:36:30 2018
New Revision: 334105
URL: http://llvm.org/viewvc/llvm-project?rev=334105&view=rev
Log:
Change TII isCopyInstr way of returning arguments(NFC)
Make TII isCopyInstr() return MachineOperands through pointer to pointer
instead via reference.
Patch by Nikola Prica.
Differential Revision: https://reviews.llvm.org/D47364
Modified:
llvm/trunk/include/llvm/CodeGen/TargetInstrInfo.h
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h
llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.h
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.h
Modified: llvm/trunk/include/llvm/CodeGen/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/TargetInstrInfo.h?rev=334105&r1=334104&r2=334105&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/TargetInstrInfo.h Wed Jun 6 09:36:30 2018
@@ -849,8 +849,9 @@ public:
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return true along with
/// @Source machine operand and @Destination machine operand.
- virtual bool isCopyInstr(const MachineInstr &MI, MachineOperand &Source,
- MachineOperand &Destination) const {
+ virtual bool isCopyInstr(const MachineInstr &MI,
+ const MachineOperand *&SourceOpNum,
+ const MachineOperand *&Destination) const {
return false;
}
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=334105&r1=334104&r2=334105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Wed Jun 6 09:36:30 2018
@@ -935,8 +935,9 @@ void ARMBaseInstrInfo::copyPhysReg(Machi
Mov->addRegisterKilled(SrcReg, TRI);
}
-bool ARMBaseInstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const {
+bool ARMBaseInstrInfo::isCopyInstr(const MachineInstr &MI,
+ const MachineOperand *&Src,
+ const MachineOperand *&Dest) const {
// VMOVRRD is also a copy instruction but it requires
// special way of handling. It is more complex copy version
// and since that we are not considering it. For recognition
@@ -948,8 +949,8 @@ bool ARMBaseInstrInfo::isCopyInstr(const
(MI.getOpcode() == ARM::VORRq &&
MI.getOperand(1).getReg() != MI.getOperand(2).getReg()))
return false;
- Dest = MI.getOperand(0);
- Src = MI.getOperand(1);
+ Dest = &MI.getOperand(0);
+ Src = &MI.getOperand(1);
return true;
}
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=334105&r1=334104&r2=334105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Wed Jun 6 09:36:30 2018
@@ -201,8 +201,8 @@ public:
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
- bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const override;
+ bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
+ const MachineOperand *&Dest) const override;
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp?rev=334105&r1=334104&r2=334105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp Wed Jun 6 09:36:30 2018
@@ -97,11 +97,12 @@ void Mips16InstrInfo::copyPhysReg(Machin
MIB.addReg(SrcReg, getKillRegState(KillSrc));
}
-bool Mips16InstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const {
+bool Mips16InstrInfo::isCopyInstr(const MachineInstr &MI,
+ const MachineOperand *&Src,
+ const MachineOperand *&Dest) const {
if (MI.isMoveReg()) {
- Dest = MI.getOperand(0);
- Src = MI.getOperand(1);
+ Dest = &MI.getOperand(0);
+ Src = &MI.getOperand(1);
return true;
}
return false;
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h?rev=334105&r1=334104&r2=334105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h Wed Jun 6 09:36:30 2018
@@ -53,8 +53,8 @@ public:
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
- bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const override;
+ bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
+ const MachineOperand *&Dest) const override;
void storeRegToStack(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
Modified: llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp?rev=334105&r1=334104&r2=334105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp Wed Jun 6 09:36:30 2018
@@ -211,25 +211,26 @@ static bool isReadOrWritToDSPReg(const M
/// We check for the common case of 'or', as it's MIPS' preferred instruction
/// for GPRs but we have to check the operands to ensure that is the case.
/// Other move instructions for MIPS are directly identifiable.
-bool MipsSEInstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const {
+bool MipsSEInstrInfo::isCopyInstr(const MachineInstr &MI,
+ const MachineOperand *&Src,
+ const MachineOperand *&Dest) const {
bool isDSPControlWrite = false;
// Condition is made to match the creation of WRDSP/RDDSP copy instruction
// from copyPhysReg function.
if (isReadOrWritToDSPReg(MI, isDSPControlWrite)) {
- if (!MI.getOperand(1).isImm() || !(MI.getOperand(1).getImm() == (1<<4)))
+ if (!MI.getOperand(1).isImm() || MI.getOperand(1).getImm() != (1<<4))
return false;
else if (isDSPControlWrite) {
- Src = MI.getOperand(0);
- Dest = MI.getOperand(2);
+ Src = &MI.getOperand(0);
+ Dest = &MI.getOperand(2);
} else {
- Dest = MI.getOperand(0);
- Src = MI.getOperand(2);
+ Dest = &MI.getOperand(0);
+ Src = &MI.getOperand(2);
}
return true;
} else if (MI.isMoveReg() || isORCopyInst(MI)) {
- Dest = MI.getOperand(0);
- Src = MI.getOperand(1);
+ Dest = &MI.getOperand(0);
+ Src = &MI.getOperand(1);
return true;
}
return false;
Modified: llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.h?rev=334105&r1=334104&r2=334105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.h Wed Jun 6 09:36:30 2018
@@ -47,8 +47,8 @@ public:
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
- bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const override;
+ bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
+ const MachineOperand *&Dest) const override;
void storeRegToStack(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=334105&r1=334104&r2=334105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Wed Jun 6 09:36:30 2018
@@ -6852,11 +6852,12 @@ void X86InstrInfo::copyPhysReg(MachineBa
llvm_unreachable("Cannot emit physreg copy instruction");
}
-bool X86InstrInfo::isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const {
+bool X86InstrInfo::isCopyInstr(const MachineInstr &MI,
+ const MachineOperand *&Src,
+ const MachineOperand *&Dest) const {
if (MI.isMoveReg()) {
- Dest = MI.getOperand(0);
- Src = MI.getOperand(1);
+ Dest = &MI.getOperand(0);
+ Src = &MI.getOperand(1);
return true;
}
return false;
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=334105&r1=334104&r2=334105&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Wed Jun 6 09:36:30 2018
@@ -394,8 +394,8 @@ public:
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
- bool isCopyInstr(const MachineInstr &MI, MachineOperand &Src,
- MachineOperand &Dest) const override;
+ bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
+ const MachineOperand *&Dest) const override;
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, unsigned SrcReg,
bool isKill, int FrameIndex,
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