[PATCH] D47638: [mips] Correct the predicates for a number of codegen only instructions
Simon Dardis via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 6 02:26:19 PDT 2018
sdardis added a comment.
This particular case is not quite testable, as GPR64s are only available when we have 64 bit registers. Adding GPR_64 predicates to these instructions is somewhat overkill, but does simplify fixing up the scheduler models later.
Repository:
rL LLVM
https://reviews.llvm.org/D47638
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