[PATCH] D47638: [mips] Correct the predicates for a number of codegen only instructions

[Simon Dardis via Phabricator via llvm-commits]

sdardis added a comment.

This particular case is not quite testable, as GPR64s are only available when we have 64 bit registers. Adding GPR_64 predicates to these instructions is somewhat overkill, but does simplify fixing up the scheduler models later.


Repository:
  rL LLVM

https://reviews.llvm.org/D47638