[PATCH] D47805: [AMDGPU] Improve reciprocal handling

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec created this revision.
rampitec added reviewers: b-sumner, arsenm.
Herald added subscribers: t-tye, Anastasia, tpr, dstuttard, yaxunl, nhaehnle, wdng, kzhuravl.

When denormals are supported we are producing a full division for
1.0f / x. That still can be replaced by the faster version:

  bool c = fabs(x) > 0x1.0p+96f;
  float s = c ? 0x1.0p-32f : 1.0f;
  x *= s;
  return s * v_rcp_f32(x)

in case if requested accuracy is 2.5ulp or less. The same version
is used if denormals are not supported for non 1.0 numerators, where
just v_rcp_f32 is then used for 1.0 numerator.

The optimization of 1/x is extended to the case -1/x, which is the
same except for the resulting sign bit.

OpenCL conformance passed with both enabled and disabled denorms.


https://reviews.llvm.org/D47805

Files:
  lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
  test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D47805.150059.patch
Type: text/x-patch
Size: 24178 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180606/b79dd7af/attachment.bin>