[PATCH] D47690: [X86][BMI][TBM] Only demand bottom 16-bits of the BEXTR control op (PR34042)

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM. I'll let you decide what to do with the APInts.



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:36835
+    // NOTE: SimplifyDemandedBits won't do this for constants.
+    APInt Val1 = Cst1->getAPIntValue();
+    APInt MaskedVal1 = Val1 & APInt(NumBits, 0xFFFF);
----------------
nit. this can be const APInt &Val.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:36836
+    APInt Val1 = Cst1->getAPIntValue();
+    APInt MaskedVal1 = Val1 & APInt(NumBits, 0xFFFF);
+    if (MaskedVal1 != Val1)
----------------
You can use Val1 & 0xffff if you want. There's an operator& that takes an APInt and uint64_t.

Or you could do something like.

```
if (Val1.ugt(0xFFFF)
  return DAG.getNode(X86ISD::BEXTR, SDLoc(N), VT, Op0,
                         DAG.getConstant(Val1 & 0xffff, SDLoc(N), VT));
```


Repository:
  rL LLVM

https://reviews.llvm.org/D47690