[PATCH] D47723: [CodeGen] print max throughput for 0-latency insts

Andrea Di Biagio via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 5 14:22:36 PDT 2018


andreadb accepted this revision.
andreadb added a comment.
This revision is now accepted and ready to land.

Thanks Sanjay.
It looks good to me.
I agree that this affects a lot of tests. However it looks like most of the diffs are for znver1, which apparently assigns an arbitrary 100cy latency , 1 uOp and no processor resource cycles to all microcoded instructions. So I am not particularly worried about it.
 In the absence of extra/accurate schedule information, I think that computing an optimistic reciprocal throughput based on the number of opcodes and IssueWidth is the best that we can do.


https://reviews.llvm.org/D47723





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