[llvm] r333935 - [X86] Don't pass ParitySrc array into isAddSubOrSubAddMask. Instead use a bool output parameter to get the real piece of info we care about. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 4 10:58:45 PDT 2018
Author: ctopper
Date: Mon Jun 4 10:58:45 2018
New Revision: 333935
URL: http://llvm.org/viewvc/llvm-project?rev=333935&view=rev
Log:
[X86] Don't pass ParitySrc array into isAddSubOrSubAddMask. Instead use a bool output parameter to get the real piece of info we care about. NFC
The ParitySrc array is more of an implementation detail. A single bool to get the final parity is sufficient.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=333935&r1=333934&r2=333935&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun 4 10:58:45 2018
@@ -30452,8 +30452,9 @@ static SDValue combineTargetShuffle(SDVa
/// Checks if the shuffle mask takes subsequent elements
/// alternately from two vectors.
/// For example <0, 5, 2, 7> or <8, 1, 10, 3, 12, 5, 14, 7> are both correct.
-static bool isAddSubOrSubAddMask(ArrayRef<int> Mask, int ParitySrc[2]) {
+static bool isAddSubOrSubAddMask(ArrayRef<int> Mask, bool &Op0Even) {
+ int ParitySrc[2] = {-1, -1};
unsigned Size = Mask.size();
for (unsigned i = 0; i != Size; ++i) {
int M = Mask[i];
@@ -30475,6 +30476,7 @@ static bool isAddSubOrSubAddMask(ArrayRe
if (ParitySrc[0] < 0 || ParitySrc[1] < 0 || ParitySrc[0] == ParitySrc[1])
return false;
+ Op0Even = ParitySrc[0] == 0;
return true;
}
@@ -30533,13 +30535,13 @@ static bool isAddSubOrSubAdd(SDNode *N,
}
ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(N)->getMask();
- int ParitySrc[2] = {-1, -1};
- if (!isAddSubOrSubAddMask(Mask, ParitySrc))
+ bool Op0Even;
+ if (!isAddSubOrSubAddMask(Mask, Op0Even))
return false;
// It's a subadd if the vector in the even parity is an FADD.
- IsSubAdd = ParitySrc[0] == 0 ? V1->getOpcode() == ISD::FADD
- : V2->getOpcode() == ISD::FADD;
+ IsSubAdd = Op0Even ? V1->getOpcode() == ISD::FADD
+ : V2->getOpcode() == ISD::FADD;
Opnd0 = LHS;
Opnd1 = RHS;
@@ -30576,13 +30578,13 @@ static SDValue combineShuffleToFMAddSub(
// Check for correct shuffle mask.
ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(N)->getMask();
- int ParitySrc[2] = {-1, -1};
- if (!isAddSubOrSubAddMask(Mask, ParitySrc))
+ bool Op0Even;
+ if (!isAddSubOrSubAddMask(Mask, Op0Even))
return SDValue();
// FMAddSub takes zeroth operand from FMSub node.
SDLoc DL(N);
- bool IsSubAdd = ParitySrc[0] == 0 ? Op0 == FMAdd : Op1 == FMAdd;
+ bool IsSubAdd = Op0Even ? Op0 == FMAdd : Op1 == FMAdd;
unsigned Opcode = IsSubAdd ? X86ISD::FMSUBADD : X86ISD::FMADDSUB;
return DAG.getNode(Opcode, DL, VT, FMAdd.getOperand(0), FMAdd.getOperand(1),
FMAdd.getOperand(2));
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