[PATCH] D47621: [X86] Block UndefRegUpdate

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

I'm going to accept this because AVX and SSE are consistent on cvtsi2ss and similar instructions now. But we should file a bug to fix both.



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Comment at: test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll:80
+; AVX-NEXT:    movq (%rdi), %rax
+; AVX-NEXT:    vcvtsi2ssq %rax, %xmm0, %xmm0
 ; AVX-NEXT:    retq
----------------
This did nothing to prevent an undef register update. The load goes to a GPR so it didn't do any good. But it is consistent with what was done for the SSE intruction.


Repository:
  rL LLVM

https://reviews.llvm.org/D47621