[PATCH] D47723: [CodeGen] print max throughput for 0-latency insts

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: andreadb, RKSimon, courbet.
Herald added a subscriber: mcrosier.

This is a small printing fix for the problem arising in https://reviews.llvm.org/D47374 (PR37678):
https://bugs.llvm.org/show_bug.cgi?id=37678

We don't have throughput info for instructions with variant scheduling, so assume that a zero latency inst can execute/complete at max-issue-width.


https://reviews.llvm.org/D47723

Files:
  lib/CodeGen/TargetSubtargetInfo.cpp
  test/CodeGen/X86/sse-schedule.ll


Index: test/CodeGen/X86/sse-schedule.ll
===================================================================
--- test/CodeGen/X86/sse-schedule.ll
+++ test/CodeGen/X86/sse-schedule.ll
@@ -6225,15 +6225,15 @@
 ;
 ; BTVER2-SSE-LABEL: test_fnop:
 ; BTVER2-SSE:       # %bb.0:
-; BTVER2-SSE-NEXT:    xorps %xmm0, %xmm0 # sched: [0:?]
+; BTVER2-SSE-NEXT:    xorps %xmm0, %xmm0 # sched: [0:0.50]
 ; BTVER2-SSE-NEXT:    #APP
 ; BTVER2-SSE-NEXT:    nop # sched: [1:0.50]
 ; BTVER2-SSE-NEXT:    #NO_APP
 ; BTVER2-SSE-NEXT:    retq # sched: [4:1.00]
 ;
 ; BTVER2-LABEL: test_fnop:
 ; BTVER2:       # %bb.0:
-; BTVER2-NEXT:    vxorps %xmm0, %xmm0, %xmm0 # sched: [0:?]
+; BTVER2-NEXT:    vxorps %xmm0, %xmm0, %xmm0 # sched: [0:0.50]
 ; BTVER2-NEXT:    #APP
 ; BTVER2-NEXT:    nop # sched: [1:0.50]
 ; BTVER2-NEXT:    #NO_APP
Index: lib/CodeGen/TargetSubtargetInfo.cpp
===================================================================
--- lib/CodeGen/TargetSubtargetInfo.cpp
+++ lib/CodeGen/TargetSubtargetInfo.cpp
@@ -68,10 +68,17 @@
 }
 
 static std::string createSchedInfoStr(unsigned Latency,
-                                      Optional<double> RThroughput) {
+                                      Optional<double> RThroughput,
+                                      TargetSchedModel &TSM) {
   static const char *SchedPrefix = " sched: [";
   std::string Comment;
   raw_string_ostream CS(Comment);
+
+  // Special-case: if an instruction has no latency (consumes no execution
+  // resources), then assume that it can execute at the maximum issue width.
+  if (Latency == 0 && !RThroughput.hasValue())
+    RThroughput = 1.0 / TSM.getIssueWidth();
+
   if (RThroughput.hasValue())
     CS << SchedPrefix << Latency << format(":%2.2f", RThroughput.getValue())
        << "]";
@@ -91,7 +98,7 @@
   TSchedModel.init(this);
   unsigned Latency = TSchedModel.computeInstrLatency(&MI);
   Optional<double> RThroughput = TSchedModel.computeReciprocalThroughput(&MI);
-  return createSchedInfoStr(Latency, RThroughput);
+  return createSchedInfoStr(Latency, RThroughput, TSchedModel);
 }
 
 /// Returns string representation of scheduler comment
@@ -111,7 +118,7 @@
     return std::string();
   Optional<double> RThroughput =
       TSchedModel.computeReciprocalThroughput(MCI);
-  return createSchedInfoStr(Latency, RThroughput);
+  return createSchedInfoStr(Latency, RThroughput, TSchedModel);
 }
 
 void TargetSubtargetInfo::mirFileLoaded(MachineFunction &MF) const {


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