[PATCH] D47434: AMDGPU: Turn D16 for MIMG instructions into a regular operand
Nicolai Hähnle via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 4 07:03:19 PDT 2018
nhaehnle added a comment.
In https://reviews.llvm.org/D47434#1118807, @dp wrote:
> Regarding partial register updates: would there be any performance benefit from supporting this feature for MIMG? I.e. cannot we just ignore this feature and handle upper bits as undefined?
I believe that's effectively what we're doing today.
Repository:
rL LLVM
https://reviews.llvm.org/D47434
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