[PATCH] D47714: [TableGen][AsmMatcherEmitter] Allow tied operands of different classes in aliases.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 4 06:49:17 PDT 2018
sdesmalen created this revision.
sdesmalen added reviewers: olista01, rengolin, fhahn, SjoerdMeijer, samparker, dsanders, craig.topper.
Allow a tied operand of a different operand class in InstAliases,
so that the operand can be printed (and added to the MC instruction)
as the appropriate register. For example, 'GPR64as32', which would
be printed/parsed as a 32bit register and should match a tied 64bit
register operand, where the former is a sub-register of the latter.
This patch also generalizes the constraint checking to an overrideable
method in MCTargetAsmParser, so that target asmparsers can specify
whether a given operand satisfies the tied register constraint.
https://reviews.llvm.org/D47714
Files:
include/llvm/MC/MCParser/MCTargetAsmParser.h
utils/TableGen/AsmMatcherEmitter.cpp
utils/TableGen/CodeGenInstruction.cpp
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D47714.149748.patch
Type: text/x-patch
Size: 8880 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180604/55abfffc/attachment.bin>
More information about the llvm-commits
mailing list