[PATCH] D47690: [X86][BMI][TBM] Only demand bottom 16-bits of the BEXTR control op (PR34042)

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 3 14:47:47 PDT 2018


craig.topper added inline comments.


================
Comment at: lib/Target/X86/X86InstrCompiler.td:2051
-            (BEXTRI64ri GR64:$src1, i64immSExt32:$src2)>;
   def : Pat<(X86bextr (loadi64 addr:$src1), i64immSExt32:$src2),
             (BEXTRI64mi addr:$src1, i64immSExt32:$src2)>;
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lebedev.ri wrote:
> Why `SExt`; ahouldn't `ZExt` be fine, especially since only low 16 bits will be used?
Its consistent with the behavior of the gnu assembler and basically any other 64 bit x86 instruction that only encodes a 32 bit immediate. Doing something else would require a new assembly parser method specifically for this instruction.


Repository:
  rL LLVM

https://reviews.llvm.org/D47690





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