[llvm] r333849 - [X86][TBM] Use realistic BEXTR control bits

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 3 11:15:06 PDT 2018


Author: rksimon
Date: Sun Jun  3 11:15:06 2018
New Revision: 333849

URL: http://llvm.org/viewvc/llvm-project?rev=333849&view=rev
Log:
[X86][TBM] Use realistic BEXTR control bits

Avoid constant values that are guaranteed to give zero

Found while investigating BEXTR optimizations for PR34042.

Modified:
    llvm/trunk/test/CodeGen/X86/stack-folding-tbm.ll
    llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll
    llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
    llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
    llvm/trunk/test/CodeGen/X86/tbm-intrinsics.ll

Modified: llvm/trunk/test/CodeGen/X86/stack-folding-tbm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-folding-tbm.ll?rev=333849&r1=333848&r2=333849&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stack-folding-tbm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stack-folding-tbm.ll Sun Jun  3 11:15:06 2018
@@ -11,9 +11,9 @@ target triple = "x86_64-unknown-unknown"
 define i32 @stack_fold_bextri_u32(i32 %a0) {
   ;CHECK-LABEL: stack_fold_bextri_u32
   ;CHECK:       # %bb.0:
-  ;CHECK:       bextrl $2814, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
+  ;CHECK:       bextrl $3841, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
   %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
-  %2 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a0, i32 2814)
+  %2 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a0, i32 3841)
   ret i32 %2
 }
 declare i32 @llvm.x86.tbm.bextri.u32(i32, i32)
@@ -21,9 +21,9 @@ declare i32 @llvm.x86.tbm.bextri.u32(i32
 define i64 @stack_fold_bextri_u64(i64 %a0) {
   ;CHECK-LABEL: stack_fold_bextri_u64
   ;CHECK:       # %bb.0:
-  ;CHECK:       bextrq $2814, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
+  ;CHECK:       bextrq $3841, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
   %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
-  %2 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a0, i64 2814)
+  %2 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a0, i64 3841)
   ret i64 %2
 }
 declare i64 @llvm.x86.tbm.bextri.u64(i64, i64)

Modified: llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll?rev=333849&r1=333848&r2=333849&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll Sun Jun  3 11:15:06 2018
@@ -6,9 +6,9 @@
 define i64 @test__bextri_u64(i64 %a0) {
 ; X64-LABEL: test__bextri_u64:
 ; X64:       # %bb.0:
-; X64-NEXT:    bextrq $1, %rdi, %rax
+; X64-NEXT:    bextrq $3841, %rdi, %rax # imm = 0xF01
 ; X64-NEXT:    retq
-  %1 = call i64 @llvm.x86.tbm.bextri.u64(i64 %a0, i64 1)
+  %1 = call i64 @llvm.x86.tbm.bextri.u64(i64 %a0, i64 3841)
   ret i64 %1
 }
 

Modified: llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll?rev=333849&r1=333848&r2=333849&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll Sun Jun  3 11:15:06 2018
@@ -7,14 +7,14 @@
 define i32 @test__bextri_u32(i32 %a0) {
 ; X32-LABEL: test__bextri_u32:
 ; X32:       # %bb.0:
-; X32-NEXT:    bextrl $1, {{[0-9]+}}(%esp), %eax
+; X32-NEXT:    bextrl $3841, {{[0-9]+}}(%esp), %eax # imm = 0xF01
 ; X32-NEXT:    retl
 ;
 ; X64-LABEL: test__bextri_u32:
 ; X64:       # %bb.0:
-; X64-NEXT:    bextrl $1, %edi, %eax
+; X64-NEXT:    bextrl $3841, %edi, %eax # imm = 0xF01
 ; X64-NEXT:    retq
-  %1 = call i32 @llvm.x86.tbm.bextri.u32(i32 %a0, i32 1)
+  %1 = call i32 @llvm.x86.tbm.bextri.u32(i32 %a0, i32 3841)
   ret i32 %1
 }
 

Modified: llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll?rev=333849&r1=333848&r2=333849&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll Sun Jun  3 11:15:06 2018
@@ -4,10 +4,10 @@
 define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
 ; CHECK-LABEL: test_x86_tbm_bextri_u64:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    bextrq $2814, %rdi, %rax # imm = 0xAFE
+; CHECK-NEXT:    bextrq $3841, %rdi, %rax # imm = 0xF01
 ; CHECK-NEXT:    retq
 entry:
-  %0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 2814)
+  %0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 3841)
   ret i64 %0
 }
 
@@ -16,22 +16,22 @@ declare i64 @llvm.x86.tbm.bextri.u64(i64
 define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind readonly {
 ; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    bextrq $2814, (%rdi), %rax # imm = 0xAFE
+; CHECK-NEXT:    bextrq $3841, (%rdi), %rax # imm = 0xF01
 ; CHECK-NEXT:    retq
 entry:
   %tmp1 = load i64, i64* %a, align 8
-  %0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %tmp1, i64 2814)
+  %0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %tmp1, i64 3841)
   ret i64 %0
 }
 
 define i64 @test_x86_tbm_bextri_u64_z(i64 %a, i64 %b) nounwind readnone {
 ; CHECK-LABEL: test_x86_tbm_bextri_u64_z:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    bextrq $2814, %rdi, %rax # imm = 0xAFE
+; CHECK-NEXT:    bextrq $3841, %rdi, %rax # imm = 0xF01
 ; CHECK-NEXT:    cmoveq %rsi, %rax
 ; CHECK-NEXT:    retq
 entry:
-  %0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 2814)
+  %0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 3841)
   %1 = icmp eq i64 %0, 0
   %2 = select i1 %1, i64 %b, i64 %0
   ret i64 %2

Modified: llvm/trunk/test/CodeGen/X86/tbm-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-intrinsics.ll?rev=333849&r1=333848&r2=333849&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm-intrinsics.ll Sun Jun  3 11:15:06 2018
@@ -7,17 +7,17 @@ define i32 @test_x86_tbm_bextri_u32(i32
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    addl %eax, %eax
-; X86-NEXT:    bextrl $2814, %eax, %eax # imm = 0xAFE
+; X86-NEXT:    bextrl $3841, %eax, %eax # imm = 0xF01
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_x86_tbm_bextri_u32:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    addl %edi, %edi
-; X64-NEXT:    bextrl $2814, %edi, %eax # imm = 0xAFE
+; X64-NEXT:    bextrl $3841, %edi, %eax # imm = 0xF01
 ; X64-NEXT:    retq
 entry:
   %0 = add i32 %a, %a
-  %1 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %0, i32 2814)
+  %1 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %0, i32 3841)
   ret i32 %1
 }
 
@@ -27,23 +27,23 @@ define i32 @test_x86_tbm_bextri_u32_m(i3
 ; X86-LABEL: test_x86_tbm_bextri_u32_m:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    bextrl $2814, (%eax), %eax # imm = 0xAFE
+; X86-NEXT:    bextrl $3841, (%eax), %eax # imm = 0xF01
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_x86_tbm_bextri_u32_m:
 ; X64:       # %bb.0: # %entry
-; X64-NEXT:    bextrl $2814, (%rdi), %eax # imm = 0xAFE
+; X64-NEXT:    bextrl $3841, (%rdi), %eax # imm = 0xF01
 ; X64-NEXT:    retq
 entry:
   %tmp1 = load i32, i32* %a, align 4
-  %0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %tmp1, i32 2814)
+  %0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %tmp1, i32 3841)
   ret i32 %0
 }
 
 define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind readonly {
 ; X86-LABEL: test_x86_tbm_bextri_u32_z:
 ; X86:       # %bb.0: # %entry
-; X86-NEXT:    bextrl $2814, {{[0-9]+}}(%esp), %eax # imm = 0xAFE
+; X86-NEXT:    bextrl $3841, {{[0-9]+}}(%esp), %eax # imm = 0xF01
 ; X86-NEXT:    jne .LBB2_2
 ; X86-NEXT:  # %bb.1: # %entry
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -52,11 +52,11 @@ define i32 @test_x86_tbm_bextri_u32_z(i3
 ;
 ; X64-LABEL: test_x86_tbm_bextri_u32_z:
 ; X64:       # %bb.0: # %entry
-; X64-NEXT:    bextrl $2814, %edi, %eax # imm = 0xAFE
+; X64-NEXT:    bextrl $3841, %edi, %eax # imm = 0xF01
 ; X64-NEXT:    cmovel %esi, %eax
 ; X64-NEXT:    retq
 entry:
-  %0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 2814)
+  %0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 3841)
   %1 = icmp eq i32 %0, 0
   %2 = select i1 %1, i32 %b, i32 %0
   ret i32 %2




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