[llvm] r333839 - [X86][TBM] Branch off i32 intrinsics and test on 32/64 bits
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 3 06:38:52 PDT 2018
Author: rksimon
Date: Sun Jun 3 06:38:52 2018
New Revision: 333839
URL: http://llvm.org/viewvc/llvm-project?rev=333839&view=rev
Log:
[X86][TBM] Branch off i32 intrinsics and test on 32/64 bits
Part of ongoing work to ensure we test all intrinsic style tests on 32 and 64 bit targets where possible.
Added:
llvm/trunk/test/CodeGen/X86/tbm-intrinsics.ll
Modified:
llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
Modified: llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll?rev=333839&r1=333838&r2=333839&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll Sun Jun 3 06:38:52 2018
@@ -1,41 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
-
-define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
-; CHECK-LABEL: test_x86_tbm_bextri_u32:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: bextrl $2814, %edi, %eax # imm = 0xAFE
-; CHECK-NEXT: retq
-entry:
- %0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 2814)
- ret i32 %0
-}
-
-declare i32 @llvm.x86.tbm.bextri.u32(i32, i32) nounwind readnone
-
-define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind readonly {
-; CHECK-LABEL: test_x86_tbm_bextri_u32_m:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: bextrl $2814, (%rdi), %eax # imm = 0xAFE
-; CHECK-NEXT: retq
-entry:
- %tmp1 = load i32, i32* %a, align 4
- %0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %tmp1, i32 2814)
- ret i32 %0
-}
-
-define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind readonly {
-; CHECK-LABEL: test_x86_tbm_bextri_u32_z:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: bextrl $2814, %edi, %eax # imm = 0xAFE
-; CHECK-NEXT: cmovel %esi, %eax
-; CHECK-NEXT: retq
-entry:
- %0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 2814)
- %1 = icmp eq i32 %0, 0
- %2 = select i1 %1, i32 %b, i32 %0
- ret i32 %2
-}
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s
define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
; CHECK-LABEL: test_x86_tbm_bextri_u64:
Added: llvm/trunk/test/CodeGen/X86/tbm-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-intrinsics.ll?rev=333839&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-intrinsics.ll (added)
+++ llvm/trunk/test/CodeGen/X86/tbm-intrinsics.ll Sun Jun 3 06:38:52 2018
@@ -0,0 +1,63 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+tbm,+cmov | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefixes=CHECK,X64
+
+define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
+; X86-LABEL: test_x86_tbm_bextri_u32:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: addl %eax, %eax
+; X86-NEXT: bextrl $2814, %eax, %eax # imm = 0xAFE
+; X86-NEXT: retl
+;
+; X64-LABEL: test_x86_tbm_bextri_u32:
+; X64: # %bb.0: # %entry
+; X64-NEXT: addl %edi, %edi
+; X64-NEXT: bextrl $2814, %edi, %eax # imm = 0xAFE
+; X64-NEXT: retq
+entry:
+ %0 = add i32 %a, %a
+ %1 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %0, i32 2814)
+ ret i32 %1
+}
+
+declare i32 @llvm.x86.tbm.bextri.u32(i32, i32) nounwind readnone
+
+define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind readonly {
+; X86-LABEL: test_x86_tbm_bextri_u32_m:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: bextrl $2814, (%eax), %eax # imm = 0xAFE
+; X86-NEXT: retl
+;
+; X64-LABEL: test_x86_tbm_bextri_u32_m:
+; X64: # %bb.0: # %entry
+; X64-NEXT: bextrl $2814, (%rdi), %eax # imm = 0xAFE
+; X64-NEXT: retq
+entry:
+ %tmp1 = load i32, i32* %a, align 4
+ %0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %tmp1, i32 2814)
+ ret i32 %0
+}
+
+define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind readonly {
+; X86-LABEL: test_x86_tbm_bextri_u32_z:
+; X86: # %bb.0: # %entry
+; X86-NEXT: bextrl $2814, {{[0-9]+}}(%esp), %eax # imm = 0xAFE
+; X86-NEXT: jne .LBB2_2
+; X86-NEXT: # %bb.1: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: .LBB2_2: # %entry
+; X86-NEXT: retl
+;
+; X64-LABEL: test_x86_tbm_bextri_u32_z:
+; X64: # %bb.0: # %entry
+; X64-NEXT: bextrl $2814, %edi, %eax # imm = 0xAFE
+; X64-NEXT: cmovel %esi, %eax
+; X64-NEXT: retq
+entry:
+ %0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 2814)
+ %1 = icmp eq i32 %0, 0
+ %2 = select i1 %1, i32 %b, i32 %0
+ ret i32 %2
+}
More information about the llvm-commits
mailing list