[PATCH] D47655: [MachineOutliner] Don't outline sequences where x16/x17/nzcv are live across

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

It was mentioned on https://reviews.llvm.org/D47553 that outlining also needs special handling for atomic sequences (on AArch64, LDXR/STXR etc. can fail if there's an indirect branch between the two).  I guess we don't model the exclusive lock as a register at the moment?

Looks fine otherwise.



================
Comment at: lib/Target/AArch64/AArch64InstrInfo.cpp:4949
+  // According to
+  // infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf,
+  // the following are undefined on entry/exit from a function call:
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Please put the title of the document in question, instead of a link; links tend to go stale.


https://reviews.llvm.org/D47655