[llvm] r333728 - [X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encodes a GPR.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu May 31 23:11:29 PDT 2018
Author: ctopper
Date: Thu May 31 23:11:29 2018
New Revision: 333728
URL: http://llvm.org/viewvc/llvm-project?rev=333728&view=rev
Log:
[X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encodes a GPR.
This is different than the behavior of EVEX.X extending modrm.rm to 5 bits.
Added:
llvm/trunk/test/MC/Disassembler/X86/invalid-EVEX-R2.txt
Modified:
llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
Modified: llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp?rev=333728&r1=333727&r2=333728&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp Thu May 31 23:11:29 2018
@@ -1445,7 +1445,7 @@ static int readModRM(struct InternalInst
return 0;
}
-#define GENERIC_FIXUP_FUNC(name, base, prefix) \
+#define GENERIC_FIXUP_FUNC(name, base, prefix, mask) \
static uint16_t name(struct InternalInstruction *insn, \
OperandType type, \
uint8_t index, \
@@ -1459,7 +1459,9 @@ static int readModRM(struct InternalInst
case TYPE_Rv: \
return base + index; \
case TYPE_R8: \
- index &= 0xf; \
+ index &= mask; \
+ if (index > 0xf) \
+ *valid = 0; \
if (insn->rexPrefix && \
index >= 4 && index <= 7) { \
return prefix##_SPL + (index - 4); \
@@ -1467,11 +1469,20 @@ static int readModRM(struct InternalInst
return prefix##_AL + index; \
} \
case TYPE_R16: \
- return prefix##_AX + (index & 0xf); \
+ index &= mask; \
+ if (index > 0xf) \
+ *valid = 0; \
+ return prefix##_AX + index; \
case TYPE_R32: \
- return prefix##_EAX + (index & 0xf); \
+ index &= mask; \
+ if (index > 0xf) \
+ *valid = 0; \
+ return prefix##_EAX + index; \
case TYPE_R64: \
- return prefix##_RAX + (index & 0xf); \
+ index &= mask; \
+ if (index > 0xf) \
+ *valid = 0; \
+ return prefix##_RAX + index; \
case TYPE_ZMM: \
return prefix##_ZMM0 + index; \
case TYPE_YMM: \
@@ -1519,8 +1530,8 @@ static int readModRM(struct InternalInst
* field is valid for the register class; 0 if not.
* @return - The proper value.
*/
-GENERIC_FIXUP_FUNC(fixupRegValue, insn->regBase, MODRM_REG)
-GENERIC_FIXUP_FUNC(fixupRMValue, insn->eaRegBase, EA_REG)
+GENERIC_FIXUP_FUNC(fixupRegValue, insn->regBase, MODRM_REG, 0x1f)
+GENERIC_FIXUP_FUNC(fixupRMValue, insn->eaRegBase, EA_REG, 0xf)
/*
* fixupReg - Consults an operand specifier to determine which of the
Added: llvm/trunk/test/MC/Disassembler/X86/invalid-EVEX-R2.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/invalid-EVEX-R2.txt?rev=333728&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/invalid-EVEX-R2.txt (added)
+++ llvm/trunk/test/MC/Disassembler/X86/invalid-EVEX-R2.txt Thu May 31 23:11:29 2018
@@ -0,0 +1,4 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 2>&1 | grep "invalid instruction encoding"
+
+# This instruction would decode as vcvtsd2usi if the EVEX.R' field weren't 0.
+0x62 0xe1 0xff 0x08 0x79 0xc0
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