[PATCH] D47569: [Power9]Legalize and emit code for quad-precision convert from single-precision

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added inline comments.


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Comment at: lib/Target/PowerPC/PPCInstrVSX.td:3388
+                                       (COPY_TO_REGCLASS $src, VSFRC))))>;
+  def : Pat<(f128 (fpextend (f32 (load ixaddr:$src)))),
+            (f128 (XSCVDPQP (LXSSP ixaddr:$src)))>;
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lei wrote:
> nemanjai wrote:
> > These two patterns seem:
> > 1. Redundant since we can handle loading and extending separately already anyway
> > 2. Wrong if the weird sign copying sequence is actually necessary
> > 
> > We will produce a different sequence for these two equivalent snippets of code and that seems wrong:
> > ```
> > __float128 test1(float *Ptr) {
> >   return *Ptr;
> > }
> > ```
> > vs.
> > ```
> > float __attribute__((noinline)) getFromPtr(float *Ptr) { return *Ptr; }
> > __float128 test2(float *Ptr) {
> >   return getFromPtr(Ptr);
> > }
> > ```
> Is this equivalent? `test1` returns `*Ptr` which is pass in via GPR as it's a pointer to a float, whereas `test2` is returning the return value from `getFromPtr` which is in a FPR.
Well sure. Semantically they're exactly the same thing - load a 4-byte float from memory, convert to `__float128` and return. 


https://reviews.llvm.org/D47569