[PATCH] D47425: [AArch64][GlobalISel] Zero-extend s1 values when returning.

[Aditya Nandakumar via Phabricator via llvm-commits]

aditya_nandakumar added inline comments.


================
Comment at: lib/Target/AArch64/AArch64CallLowering.cpp:237
+      MIRBuilder.buildZExt(ZExt, VReg);
+      VReg = ZExt;
+    }
----------------
rtereshin wrote:
> I think the preferred way of doing this would be `VReg = MIRBuilder.buildZExt(LLT::scalar(8), VReg)->getOperand(0).getReg();` just to avoid the explicit `MachineRegisterInfo::createGenericVirtualRegister` call. + at aditya_nandakumar 
That would be my preference as well.


Repository:
  rL LLVM

https://reviews.llvm.org/D47425