[PATCH] D46662: [X86] condition branches folding for three-way conditional codes

[Rong Xu via Phabricator via llvm-commits]

xur added a comment.

Hi Simon,
This patch was motivated by the code patterns generated in switch lowering. The tests I used were switch statements. I tested 4 cases and 15 cases, and all the cases are evenly distributed.

My initial test was on ixion-haswell.

Upton getting your review comment, I tested some other platforms:
iota-sandybridge:

  both 4case and 15 case have no performance difference

iota-ivybridge

  4case has 5% performance gain. 15 case has not performance difference.

ixion-broadwell:

  4case has -1%-2% performance loss (might be noise). 15case has 8% performance gain

indus-skylake:

  4case has 7% performance gain. 15case has 3% performance gain.


https://reviews.llvm.org/D46662