[llvm] r333660 - [X86][AVX] Add peekThroughEXTRACT_SUBVECTORs helper (NFCI)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu May 31 08:15:49 PDT 2018
Author: rksimon
Date: Thu May 31 08:15:49 2018
New Revision: 333660
URL: http://llvm.org/viewvc/llvm-project?rev=333660&view=rev
Log:
[X86][AVX] Add peekThroughEXTRACT_SUBVECTORs helper (NFCI)
We often need this for AVX1 128-bit integer ops as they may have been split from a 256-bit source.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=333660&r1=333659&r2=333660&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu May 31 08:15:49 2018
@@ -5422,6 +5422,13 @@ static SDValue peekThroughOneUseBitcasts
return V;
}
+// Peek through EXTRACT_SUBVECTORs - typically used for AVX1 256-bit intops.
+static SDValue peekThroughEXTRACT_SUBVECTORs(SDValue V) {
+ while (V.getOpcode() == ISD::EXTRACT_SUBVECTOR)
+ V = V.getOperand(0);
+ return V;
+}
+
static const Constant *getTargetConstantFromNode(SDValue Op) {
Op = peekThroughBitcasts(Op);
@@ -23137,13 +23144,8 @@ static SDValue IsSplatValue(MVT VT, SDVa
// Check for SUB(SPLAT_BV, SPLAT) cases from rotate patterns.
if (V.getOpcode() == ISD::SUB &&
!SupportedVectorVarShift(VT, Subtarget, Opcode)) {
- // Peek through any EXTRACT_SUBVECTORs.
- SDValue LHS = V.getOperand(0);
- SDValue RHS = V.getOperand(1);
- while (LHS.getOpcode() == ISD::EXTRACT_SUBVECTOR)
- LHS = LHS.getOperand(0);
- while (RHS.getOpcode() == ISD::EXTRACT_SUBVECTOR)
- RHS = RHS.getOperand(0);
+ SDValue LHS = peekThroughEXTRACT_SUBVECTORs(V.getOperand(0));
+ SDValue RHS = peekThroughEXTRACT_SUBVECTORs(V.getOperand(1));
// Ensure that the corresponding splat BV element is not UNDEF.
BitVector UndefElts;
@@ -23195,9 +23197,7 @@ static SDValue LowerScalarVariableShift(
unsigned X86OpcV = (Opcode == ISD::SHL) ? X86ISD::VSHL :
(Opcode == ISD::SRL) ? X86ISD::VSRL : X86ISD::VSRA;
- // Peek through any EXTRACT_SUBVECTORs.
- while (Amt.getOpcode() == ISD::EXTRACT_SUBVECTOR)
- Amt = Amt.getOperand(0);
+ Amt = peekThroughEXTRACT_SUBVECTORs(Amt);
if (SupportedVectorShiftWithBaseAmnt(VT, Subtarget, Opcode)) {
if (SDValue BaseShAmt = IsSplatValue(VT, Amt, dl, DAG, Subtarget, Opcode)) {
More information about the llvm-commits
mailing list