[PATCH] D44548: [DAGCombiner] Expand combining of FP logical operations to sign-setting FP operations

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:8933
+  // For vector nodes, the input must be a constant splat build vector and the
+  // splat value must be equal to SignMask.
+  if (IsVector) {
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nemanjai wrote:
> RKSimon wrote:
> > We have ISD::isConstOrConstSplat - can we use that instead and merge these 2 paths?
> I think that will fail if some of the elements are `undef`. And that seems unnecessary. Something like this:
> ```
>   %conv = bitcast <4 x float> %a to <4 x i32>
>   %and = and <4 x i32> %conv, <i32 2147483647, i32 undef, i32 undef, i32 2147483647>
> ```
> should be perfectly fine to transform.
Its not out of the question to add an 'allowUndef' optional argument (default to false) to ISD::isConstOrConstSplat


Repository:
  rL LLVM

https://reviews.llvm.org/D44548