[llvm] r333611 - [InstCombine] don't change the size of a select if it would mismatch its condition operands' sizes
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Wed May 30 17:16:58 PDT 2018
Author: spatel
Date: Wed May 30 17:16:58 2018
New Revision: 333611
URL: http://llvm.org/viewvc/llvm-project?rev=333611&view=rev
Log:
[InstCombine] don't change the size of a select if it would mismatch its condition operands' sizes
Don't always:
cast (select (cmp x, y), z, C) --> select (cmp x, y), (cast z), C'
This is something that came up as far back as D26556, and I lost track of it.
I suspect that this transform is part of the underlying problem that is
inspiring some of the recent proposals that seek to match larger patterns
that include a cast op. Even if that's not true, this transform causes
problems for codegen (particularly with vector types).
A transform to actively match the size of cmp and select operand sizes should
follow. This patch just removes the harmful canonicalization in the other
direction.
Differential Revision: https://reviews.llvm.org/D47163
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp
llvm/trunk/test/Transforms/InstCombine/cast-select.ll
llvm/trunk/test/Transforms/InstCombine/fpcast.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp?rev=333611&r1=333610&r2=333611&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Wed May 30 17:16:58 2018
@@ -283,10 +283,16 @@ Instruction *InstCombiner::commonCastTra
}
}
- // If we are casting a select, then fold the cast into the select.
- if (auto *SI = dyn_cast<SelectInst>(Src))
- if (Instruction *NV = FoldOpIntoSelect(CI, SI))
- return NV;
+ if (auto *Sel = dyn_cast<SelectInst>(Src)) {
+ // We are casting a select. Try to fold the cast into the select, but only
+ // if the select does not have a compare instruction with matching operand
+ // types. Creating a select with operands that are different sizes than its
+ // condition may inhibit other folds and lead to worse codegen.
+ auto *Cmp = dyn_cast<CmpInst>(Sel->getCondition());
+ if (!Cmp || Cmp->getOperand(0)->getType() != Sel->getType())
+ if (Instruction *NV = FoldOpIntoSelect(CI, Sel))
+ return NV;
+ }
// If we are casting a PHI, then fold the cast into the PHI.
if (auto *PN = dyn_cast<PHINode>(Src)) {
Modified: llvm/trunk/test/Transforms/InstCombine/cast-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/cast-select.ll?rev=333611&r1=333610&r2=333611&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/cast-select.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/cast-select.ll Wed May 30 17:16:58 2018
@@ -4,8 +4,8 @@
define i64 @zext(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @zext(
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[Z:%.*]] to i64
-; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i64 0, i64 [[TMP1]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 0, i32 [[Z:%.*]]
+; CHECK-NEXT: [[R:%.*]] = zext i32 [[SEL]] to i64
; CHECK-NEXT: ret i64 [[R]]
;
%cmp = icmp eq i32 %x, %y
@@ -17,8 +17,8 @@ define i64 @zext(i32 %x, i32 %y, i32 %z)
define <2 x i32> @zext_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
; CHECK-LABEL: @zext_vec(
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i8> [[Z:%.*]] to <2 x i32>
-; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 7>
+; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[Z:%.*]], <2 x i8> <i8 42, i8 7>
+; CHECK-NEXT: [[R:%.*]] = zext <2 x i8> [[SEL]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%cmp = icmp ugt <2 x i8> %x, %y
@@ -30,8 +30,8 @@ define <2 x i32> @zext_vec(<2 x i8> %x,
define i64 @sext(i8 %x, i8 %y, i8 %z) {
; CHECK-LABEL: @sext(
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = sext i8 [[Z:%.*]] to i64
-; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i64 42, i64 [[TMP1]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 42, i8 [[Z:%.*]]
+; CHECK-NEXT: [[R:%.*]] = sext i8 [[SEL]] to i64
; CHECK-NEXT: ret i64 [[R]]
;
%cmp = icmp ult i8 %x, %y
@@ -43,8 +43,8 @@ define i64 @sext(i8 %x, i8 %y, i8 %z) {
define <2 x i32> @sext_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
; CHECK-LABEL: @sext_vec(
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = sext <2 x i8> [[Z:%.*]] to <2 x i32>
-; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 7>
+; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[Z:%.*]], <2 x i8> <i8 42, i8 7>
+; CHECK-NEXT: [[R:%.*]] = sext <2 x i8> [[SEL]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%cmp = icmp ugt <2 x i8> %x, %y
@@ -56,8 +56,8 @@ define <2 x i32> @sext_vec(<2 x i8> %x,
define i16 @trunc(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @trunc(
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Z:%.*]] to i16
-; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i16 42, i16 [[TMP1]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 42, i32 [[Z:%.*]]
+; CHECK-NEXT: [[R:%.*]] = trunc i32 [[SEL]] to i16
; CHECK-NEXT: ret i16 [[R]]
;
%cmp = icmp ult i32 %x, %y
@@ -69,8 +69,8 @@ define i16 @trunc(i32 %x, i32 %y, i32 %z
define <2 x i32> @trunc_vec(<2 x i64> %x, <2 x i64> %y, <2 x i64> %z) {
; CHECK-LABEL: @trunc_vec(
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i64> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i64> [[Z:%.*]] to <2 x i32>
-; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 7>
+; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[Z:%.*]], <2 x i64> <i64 42, i64 7>
+; CHECK-NEXT: [[R:%.*]] = trunc <2 x i64> [[SEL]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%cmp = icmp ugt <2 x i64> %x, %y
@@ -82,8 +82,8 @@ define <2 x i32> @trunc_vec(<2 x i64> %x
define double @fpext(float %x, float %y, float %z) {
; CHECK-LABEL: @fpext(
; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = fpext float [[Z:%.*]] to double
-; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], double 1.700000e+01, double [[TMP1]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float 1.700000e+01, float [[Z:%.*]]
+; CHECK-NEXT: [[R:%.*]] = fpext float [[SEL]] to double
; CHECK-NEXT: ret double [[R]]
;
%cmp = fcmp oeq float %x, %y
@@ -95,8 +95,8 @@ define double @fpext(float %x, float %y,
define <2 x double> @fpext_vec(<2 x float> %x, <2 x float> %y, <2 x float> %z) {
; CHECK-LABEL: @fpext_vec(
; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt <2 x float> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = fpext <2 x float> [[Z:%.*]] to <2 x double>
-; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[CMP]], <2 x double> [[TMP1]], <2 x double> <double 4.200000e+01, double -2.000000e+00>
+; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x float> [[Z:%.*]], <2 x float> <float 4.200000e+01, float -2.000000e+00>
+; CHECK-NEXT: [[R:%.*]] = fpext <2 x float> [[SEL]] to <2 x double>
; CHECK-NEXT: ret <2 x double> [[R]]
;
%cmp = fcmp ugt <2 x float> %x, %y
@@ -108,8 +108,8 @@ define <2 x double> @fpext_vec(<2 x floa
define float @fptrunc(double %x, double %y, double %z) {
; CHECK-LABEL: @fptrunc(
; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = fptrunc double [[Z:%.*]] to float
-; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], float 4.200000e+01, float [[TMP1]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], double 4.200000e+01, double [[Z:%.*]]
+; CHECK-NEXT: [[R:%.*]] = fptrunc double [[SEL]] to float
; CHECK-NEXT: ret float [[R]]
;
%cmp = fcmp ult double %x, %y
@@ -121,8 +121,8 @@ define float @fptrunc(double %x, double
define <2 x float> @fptrunc_vec(<2 x double> %x, <2 x double> %y, <2 x double> %z) {
; CHECK-LABEL: @fptrunc_vec(
; CHECK-NEXT: [[CMP:%.*]] = fcmp oge <2 x double> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = fptrunc <2 x double> [[Z:%.*]] to <2 x float>
-; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[CMP]], <2 x float> [[TMP1]], <2 x float> <float -4.200000e+01, float 1.200000e+01>
+; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x double> [[Z:%.*]], <2 x double> <double -4.200000e+01, double 1.200000e+01>
+; CHECK-NEXT: [[R:%.*]] = fptrunc <2 x double> [[SEL]] to <2 x float>
; CHECK-NEXT: ret <2 x float> [[R]]
;
%cmp = fcmp oge <2 x double> %x, %y
Modified: llvm/trunk/test/Transforms/InstCombine/fpcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/fpcast.ll?rev=333611&r1=333610&r2=333611&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/fpcast.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/fpcast.ll Wed May 30 17:16:58 2018
@@ -54,8 +54,8 @@ define half @test4-fast(float %a) {
define half @test5(float %a, float %b, float %c) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: [[D:%.*]] = fcmp ogt float [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = fptrunc float [[C:%.*]] to half
-; CHECK-NEXT: [[F:%.*]] = select i1 [[D]], half [[TMP1]], half 0xH3C00
+; CHECK-NEXT: [[E:%.*]] = select i1 [[D]], float [[C:%.*]], float 1.000000e+00
+; CHECK-NEXT: [[F:%.*]] = fptrunc float [[E]] to half
; CHECK-NEXT: ret half [[F]]
;
%d = fcmp ogt float %a, %b
More information about the llvm-commits
mailing list