[PATCH] D47546: [X86][SSE] Use multiplication scale factors for v8i16 SHL on pre-AVX2 targets.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: craig.topper, spatel, andreadb.

Similar to v4i32 SHL, convert v8i16 shift amounts to scale factors instead to improve performance and reduce instruction count. We were already doing this for constant shifts, this adds variable shift support.

Reduces the serial nature of the codegen, which relies on the chain of plendvb/pand+pandn+por shifts.

This is a step towards adding support for vXi16 vector rotates.


Repository:
  rL LLVM

https://reviews.llvm.org/D47546

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/vector-rotate-128.ll
  test/CodeGen/X86/vector-rotate-256.ll
  test/CodeGen/X86/vector-shift-shl-128.ll
  test/CodeGen/X86/vector-shift-shl-256.ll

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