[PATCH] D47387: [ARM] Enable SETCCCARRY lowering for Thumb1.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


================
Comment at: test/CodeGen/ARM/wide-compares.ll:13
+; CHECK-ARM-NEXT:    movwlt r12, #1
+; CHECK-ARM-NEXT:    mov r0, r12
+; CHECK-ARM-NEXT:    bx lr
----------------
rogfer01 wrote:
> I wonder if we could predicate more aggressively here and spare us that `r12` (not sure if that'd be a win though)
> 
> ```
> movwlt r0, #1 
> movwge r0, #2
> ```
This is a scheduling problem: the first mov is scheduled before the subs, so it can't clobber r0.  (This should be a bit more clear if you pass -post-RA-scheduler=false to llc.)

`-enable-misched=true` actually "fixes" this. I think this is by chance; as far as I know, there aren't any relevant heuristics.


Repository:
  rL LLVM

https://reviews.llvm.org/D47387