[PATCH] D47426: [AMDGPU] Fixed build warning

Tim Renouf via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun May 27 10:43:45 PDT 2018


tpr created this revision.
Herald added subscribers: llvm-commits, t-tye, dstuttard, yaxunl, nhaehnle, wdng, kzhuravl, arsenm.

Change-Id: I1b0f1871c9eb3f06ce82cd9bb81f5998f624a26e


Repository:
  rL LLVM

https://reviews.llvm.org/D47426

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp


Index: lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- lib/Target/AMDGPU/SIISelLowering.cpp
+++ lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3601,10 +3601,10 @@
   // Change from v4f16/v2f16 to EquivLoadVT.
   SDVTList VTList = DAG.getVTList(EquivLoadVT, MVT::Other);
 
-  SDValue Load
-    = DAG.getMemIntrinsicNode(IsIntrinsic ? ISD::INTRINSIC_W_CHAIN : Opcode, DL,
-                              VTList, Ops, M->getMemoryVT(),
-                              M->getMemOperand());
+  if (IsIntrinsic)
+    Opcode = ISD::INTRINSIC_W_CHAIN;
+  SDValue Load = DAG.getMemIntrinsicNode(Opcode, DL, VTList, Ops,
+                                         M->getMemoryVT(), M->getMemOperand());
 
   SDValue Adjusted = adjustLoadValueTypeImpl(Load, LoadVT, DL, DAG, Unpacked);
 


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