[PATCH] D47377: [X86][Sched] Fix WriteZero sched class for all CPUs.
Clement Courbet via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 25 08:50:28 PDT 2018
courbet created this revision.
courbet added reviewers: RKSimon, craig.topper.
Herald added a subscriber: gbedwell.
Herald added a reviewer: andreadb.
Because the default latency and #uops are 1 in a WriteRes, they were
wrong for WriteZero.
Repository:
rL LLVM
https://reviews.llvm.org/D47377
Files:
lib/Target/X86/X86SchedBroadwell.td
lib/Target/X86/X86SchedHaswell.td
lib/Target/X86/X86SchedSandyBridge.td
lib/Target/X86/X86SchedSkylakeClient.td
lib/Target/X86/X86SchedSkylakeServer.td
lib/Target/X86/X86ScheduleAtom.td
lib/Target/X86/X86ScheduleBtVer2.td
lib/Target/X86/X86ScheduleSLM.td
lib/Target/X86/X86ScheduleZnver1.td
test/CodeGen/X86/avx512-intrinsics-upgrade.ll
test/CodeGen/X86/avx512vl-intrinsics.ll
test/CodeGen/X86/schedule-x86_64.ll
test/CodeGen/X86/sttni.ll
test/CodeGen/X86/vec_cast.ll
test/CodeGen/X86/x87-schedule.ll
test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll
test/tools/llvm-mca/X86/Broadwell/resources-x86_64.s
test/tools/llvm-mca/X86/Broadwell/resources-x87.s
test/tools/llvm-mca/X86/BtVer2/resources-x87.s
test/tools/llvm-mca/X86/Haswell/resources-x86_64.s
test/tools/llvm-mca/X86/Haswell/resources-x87.s
test/tools/llvm-mca/X86/SLM/resources-x87.s
test/tools/llvm-mca/X86/SandyBridge/resources-x86_64.s
test/tools/llvm-mca/X86/SandyBridge/resources-x87.s
test/tools/llvm-mca/X86/SkylakeClient/resources-x86_64.s
test/tools/llvm-mca/X86/SkylakeClient/resources-x87.s
test/tools/llvm-mca/X86/SkylakeServer/resources-x86_64.s
test/tools/llvm-mca/X86/SkylakeServer/resources-x87.s
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D47377.148614.patch
Type: text/x-patch
Size: 30801 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180525/5bf027a9/attachment.bin>
More information about the llvm-commits
mailing list