[PATCH] D47374: [RFC][patch 3/3] Add support for variant scheduling classes in llvm-mca.

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb created this revision.
andreadb added reviewers: craig.topper, RKSimon, atrick, spatel, gbedwell, filcab.
Herald added a subscriber: tschuett.

This patch is the second of a sequence of three patches related to LLVM-dev RFC "MC support for variant scheduling classes". http://lists.llvm.org/pipermail/llvm-dev/2018-May/123181.html

This patch requires https://reviews.llvm.org/D47077 to be applied first.

The main goal of this patch is to teach llvm-mca how to solve variant scheduling classes.
This patch does that, plus it adds a variant scheduling class to the BtVer2 scheduling model to identify so-called zero-idioms (data dependency breaking instructions that are known to produce zero, and that are optimized out at register renaming stage).

Without the BtVer2 change, this patch would not have had any tests.
This patch is effectively the union of two changes:

1. the llvm-mca change that enables the resolution of variant scheduling classes, and
2. the change to the BtVer2 scheduling model.

Point 2. (partially) fixes PR36671.
Point 1. fixes PR36672.

@RKSimon and @craig.topper , the new scheduling predicate for the XOR zero-idiom is quite simple. In future, we could move predicates that are valid for multiple processor models into a common .td file.
For now, I keep that predicate check into the BtVer2 model.

Please let me know if okay to commit.

Thanks
-Andrea


https://reviews.llvm.org/D47374

Files:
  lib/Target/X86/X86ScheduleBtVer2.td
  test/CodeGen/X86/sse-schedule.ll
  test/CodeGen/X86/sse2-schedule.ll
  test/tools/llvm-mca/X86/BtVer2/zero-idioms.s
  tools/llvm-mca/InstrBuilder.cpp
  tools/llvm-mca/InstrBuilder.h
  tools/llvm-mca/InstructionInfoView.cpp

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