[PATCH] D47012: [X86] Scalar mask and scalar move optimizations

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:32208
+        isNullConstant(Cond.getOperand(1)) &&
+        AndNode.getOperand(1).getSimpleValueType().isScalarInteger() &&
+        isa<ConstantSDNode>(AndNode.getOperand(1)) &&
----------------
This isScalarInteger check is unnecessary, ConstantSDNodes can only be scalar, and the condition for an ISD::SELECT can only be scalar which means the AND would have to be scalar.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:32213
+      // setcc outputting 1 when AND resulted in 0 and vice versa.
+      SDValue Mask = AndNode.getOperand(0);
+      if (Mask.getValueType() != MVT::i8)
----------------
The tests all pass if I change this line to

```
SDValue Mask = AndNode;
```

We have a later combine that removes the mask once we've converted to v1i1.


Repository:
  rL LLVM

https://reviews.llvm.org/D47012