[llvm] r333201 - [X86][SSE] Pull out (AND (XOR X, -1), Y) matching into a helper function. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu May 24 09:16:42 PDT 2018
Author: rksimon
Date: Thu May 24 09:16:42 2018
New Revision: 333201
URL: http://llvm.org/viewvc/llvm-project?rev=333201&view=rev
Log:
[X86][SSE] Pull out (AND (XOR X, -1), Y) matching into a helper function. NFC.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=333201&r1=333200&r2=333201&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu May 24 09:16:42 2018
@@ -33867,25 +33867,40 @@ static SDValue combineCompareEqual(SDNod
return SDValue();
}
+// Try to match (and (xor X, -1), Y) logic pattern for (andnp X, Y) combines.
+static bool matchANDXORWithAllOnesAsANDNP(SDNode *N, SDValue &X, SDValue &Y) {
+ if (N->getOpcode() != ISD::AND)
+ return false;
+
+ SDValue N0 = N->getOperand(0);
+ SDValue N1 = N->getOperand(1);
+ if (N0.getOpcode() == ISD::XOR &&
+ ISD::isBuildVectorAllOnes(N0.getOperand(1).getNode())) {
+ X = N0.getOperand(0);
+ Y = N1;
+ return true;
+ }
+ if (N1.getOpcode() == ISD::XOR &&
+ ISD::isBuildVectorAllOnes(N1.getOperand(1).getNode())) {
+ X = N1.getOperand(0);
+ Y = N0;
+ return true;
+ }
+
+ return false;
+}
+
/// Try to fold: (and (xor X, -1), Y) -> (andnp X, Y).
static SDValue combineANDXORWithAllOnesIntoANDNP(SDNode *N, SelectionDAG &DAG) {
assert(N->getOpcode() == ISD::AND);
EVT VT = N->getValueType(0);
- SDValue N0 = N->getOperand(0);
- SDValue N1 = N->getOperand(1);
- SDLoc DL(N);
-
if (VT != MVT::v2i64 && VT != MVT::v4i64 && VT != MVT::v8i64)
return SDValue();
- if (N0.getOpcode() == ISD::XOR &&
- ISD::isBuildVectorAllOnes(N0.getOperand(1).getNode()))
- return DAG.getNode(X86ISD::ANDNP, DL, VT, N0.getOperand(0), N1);
-
- if (N1.getOpcode() == ISD::XOR &&
- ISD::isBuildVectorAllOnes(N1.getOperand(1).getNode()))
- return DAG.getNode(X86ISD::ANDNP, DL, VT, N1.getOperand(0), N0);
+ SDValue X, Y;
+ if (matchANDXORWithAllOnesAsANDNP(N, X, Y))
+ return DAG.getNode(X86ISD::ANDNP, SDLoc(N), VT, X, Y);
return SDValue();
}
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