[llvm] r333165 - [ScheduleDAGInstrs / buildSchedGraph] Clear subregister entries also.

[Jonas Paulsson via llvm-commits]

Author: jonpa
Date: Thu May 24 01:38:06 2018
New Revision: 333165

URL: http://llvm.org/viewvc/llvm-project?rev=333165&view=rev
Log:
[ScheduleDAGInstrs / buildSchedGraph]  Clear subregister entries also.

In addPhysRegDeps, subregister entries of the defined register were previously
not removed from Uses or Defs, which resulted in extra redundant edges for
subregs around the register definition.

This is principally NFC (in very rare cases some node got a different height).

This makes the DAG more readable and efficient in some cases.

Review: Andy Trick
https://reviews.llvm.org/D46838

Modified:
    llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp

Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=333165&r1=333164&r2=333165&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)
+++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Thu May 24 01:38:06 2018
@@ -318,13 +318,14 @@ void ScheduleDAGInstrs::addPhysRegDeps(S
   } else {
     addPhysRegDataDeps(SU, OperIdx);
 
-    // clear this register's use list
-    if (Uses.contains(Reg))
-      Uses.eraseAll(Reg);
-
-    if (!MO.isDead()) {
-      Defs.eraseAll(Reg);
-    } else if (SU->isCall) {
+    // Clear previous uses and defs of this register and its subergisters.
+    for (MCSubRegIterator SubReg(Reg, TRI, true); SubReg.isValid(); ++SubReg) {
+      if (Uses.contains(*SubReg))
+        Uses.eraseAll(*SubReg);
+      if (!MO.isDead())
+        Defs.eraseAll(*SubReg);
+    }
+    if (MO.isDead() && SU->isCall) {
       // Calls will not be reordered because of chain dependencies (see
       // below). Since call operands are dead, calls may continue to be added
       // to the DefList making dependence checking quadratic in the size of