[PATCH] D47258: [Sparc] Select correct register class for FP register constraints

James Y Knight via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 23 11:08:32 PDT 2018


jyknight added a comment.

Some test cases for the error cases would be good here (e.g. "{f1}" with a double).



================
Comment at: lib/Target/Sparc/SparcISelLowering.cpp:3501-3504
     //       r0-r7   -> g0-g7
     //       r8-r15  -> o0-o7
     //       r16-r23 -> l0-l7
     //       r24-r31 -> i0-i7
----------------
Ugh, unrelated to this commit, but this just made me notice that in Clang's inline asm code, we convert register names *to* r0-r31, only to convert it back, here. That's just silly.


================
Comment at: lib/Target/Sparc/SparcISelLowering.cpp:3516
     }
+    if (name.substr(0, 1).equals("f") &&
+        !name.substr(1).getAsInteger(10, intVal) && intVal <= 63) {
----------------
As a note, that SparcAsmParser.cpp has to do something very similar in MorphToDoubleReg. It might be nice if they could use the same code. But, this seems fine for now.




Repository:
  rL LLVM

https://reviews.llvm.org/D47258





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