[PATCH] D47156: [DAGCombiner] isAllOnesConstantOrAllOnesSplatConstant(): look through bitcasts

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 21 12:56:35 PDT 2018


lebedev.ri added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:916
 static bool isAllOnesConstantOrAllOnesSplatConstant(SDValue N) {
+  if (N.getOpcode() == ISD::BITCAST)
+    return isAllOnesConstantOrAllOnesSplatConstant(N.getOperand(0));
----------------
The comment next to the `ISD::BITCAST` declaration notes:
```
    /// This operator is subtly different from the bitcast instruction from
    /// LLVM-IR since this node may change the bits in the register. For
    /// example, this occurs on big-endian NEON and big-endian MSA where the
    /// layout of the bits in the register depends on the vector type and this
    /// operator acts as a shuffle operation for some vector type combinations.
    BITCAST,
```
so i'm not too sure this is that simple,
but currently also i don't see an alternative solution.


Repository:
  rL LLVM

https://reviews.llvm.org/D47156





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