[PATCH] D46528: [DAGCombine][X86][AArch64] Masked merge unfolding: vector edition.
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 21 10:05:58 PDT 2018
lebedev.ri added inline comments.
================
Comment at: test/CodeGen/X86/unfold-masked-merge-vector-variablemask-const.ll:65
+; CHECK-SSE2-NEXT: pand (%rdi), %xmm0
+; CHECK-SSE2-NEXT: por %xmm1, %xmm0
; CHECK-SSE2-NEXT: retq
----------------
RKSimon wrote:
> This regression is rather unfortunate - anyway that we can get the X86ISD::ANDNP back?
Uhh, great observation :/
I think this case isn't even supposed to be affected,
since we skip all `not` `xor`'s...
I guess `isAllOnesConstantOrAllOnesSplatConstant()` is somehow misbehaving.
Repository:
rL LLVM
https://reviews.llvm.org/D46528
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