[PATCH] D46528: [DAGCombine][X86][AArch64] Masked merge unfolding: vector edition.

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

We may be waiting for the test coverage to be resolved, but this logic change LGTM



================
Comment at: lib/Target/AArch64/AArch64ISelLowering.h:455
+    if (!VT.isVector())
+      return hasAndNotCompare(Y);
+
----------------
Could just return true here? We could assert that we're not dealing with FP if that's a concern.


Repository:
  rL LLVM

https://reviews.llvm.org/D46528