[PATCH] D46992: [AMDGPU] Add perf hints to functions

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 18 15:35:49 PDT 2018


rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/AMDGPUPerfHint.cpp:277-278
+      } else if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(&I)) {
+        APInt Off(DL->getIndexSizeInBits(GEP->getPointerAddressSpace()), 0);
+        if (GEP->accumulateConstantOffset(*DL, Off)) {
+          if (Off.isIntN(12))
----------------
arsenm wrote:
> isLegalAddressingMode (although at this point this should probably be a machine pass, but I understand that's more work to rewrite)
There is no TLI or subtarget here yet.


================
Comment at: lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp:257-261
+        APInt Off(DL->getIndexSizeInBits(GEP->getPointerAddressSpace()), 0);
+        if (GEP->accumulateConstantOffset(*DL, Off)) {
+          if (Off.isIntN(12))
+            // Offset will likely be folded into load or store
+            continue;
----------------
arsenm wrote:
> isLegalAddressingMode.
> 
> I'm not sure I understand why this pass is doing most of what it's doing. Why does the addressing mode match matter for determining if the function is probably memory bound?
> 
> With a machine pass you would have a much more exact idea of the number of memory operations really being executed
It matters because we are trying to estimate memory to ALU instruction ratio. A foldable GEP does not result in an instruction.

In fact this is a rough estimation, completely correct answer is not needed.

On the machine IR in turn it will be very difficult to track pointers.


https://reviews.llvm.org/D46992





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