[PATCH] D46008: [X86][AArch64][NFC] Add tests for vector masked merge unfolding

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

In https://reviews.llvm.org/D46008#1101250, @lebedev.ri wrote:

> One observation i can make - under `SSE1`, the `v8i32` are scalarized, not split into 2x `v4i32`.
>  It looks like a bug?


I think that's the same thing I mentioned in https://reviews.llvm.org/D46528. We're not transforming to x86-specific opcodes early, so legalization does the safe thing for the illegal types - scalarization. Nobody cares about the perf of SSE1-only at this point, so it's not worth fixing IMO. That also means it's not worth testing so thoroughly here (and I think even x86 fans' eyeballs would fall out before they get anywhere close to confirming those entire asm sequences are correct!).

So I'd second Simon's opinion that we just remove the SSE1 run, but if you insist...LGTM. :)


Repository:
  rL LLVM

https://reviews.llvm.org/D46008