[llvm] r332774 - DAG: Fix crash on shift with large shift amounts
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri May 18 14:54:17 PDT 2018
Author: arsenm
Date: Fri May 18 14:54:16 2018
New Revision: 332774
URL: http://llvm.org/viewvc/llvm-project?rev=332774&view=rev
Log:
DAG: Fix crash on shift with large shift amounts
Fixes bug 37521.
Added:
llvm/trunk/test/CodeGen/X86/bug37521.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=332774&r1=332773&r2=332774&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Fri May 18 14:54:16 2018
@@ -1073,11 +1073,11 @@ SDValue DAGTypeLegalizer::JoinIntegers(S
EVT NVT = EVT::getIntegerVT(*DAG.getContext(),
LVT.getSizeInBits() + HVT.getSizeInBits());
+ EVT ShiftAmtVT = TLI.getShiftAmountTy(NVT, DAG.getDataLayout(), false);
Lo = DAG.getNode(ISD::ZERO_EXTEND, dlLo, NVT, Lo);
Hi = DAG.getNode(ISD::ANY_EXTEND, dlHi, NVT, Hi);
Hi = DAG.getNode(ISD::SHL, dlHi, NVT, Hi,
- DAG.getConstant(LVT.getSizeInBits(), dlHi,
- TLI.getShiftAmountTy(NVT, DAG.getDataLayout())));
+ DAG.getConstant(LVT.getSizeInBits(), dlHi, ShiftAmtVT));
return DAG.getNode(ISD::OR, dlHi, NVT, Lo, Hi);
}
Added: llvm/trunk/test/CodeGen/X86/bug37521.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bug37521.ll?rev=332774&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bug37521.ll (added)
+++ llvm/trunk/test/CodeGen/X86/bug37521.ll Fri May 18 14:54:16 2018
@@ -0,0 +1,29 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+
+ at a = external global <16 x float>, align 64
+
+declare void @goo(<2 x i256>)
+
+define void @foo() #0 {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0:
+; CHECK-NEXT: subq $24, %rsp
+; CHECK-NEXT: movq a+{{.*}}(%rip), %r9
+; CHECK-NEXT: movq a+{{.*}}(%rip), %r8
+; CHECK-NEXT: movq a+{{.*}}(%rip), %rcx
+; CHECK-NEXT: movq a+{{.*}}(%rip), %rdx
+; CHECK-NEXT: movq a+{{.*}}(%rip), %rsi
+; CHECK-NEXT: movq {{.*}}(%rip), %rdi
+; CHECK-NEXT: vmovaps a+{{.*}}(%rip), %xmm0
+; CHECK-NEXT: vmovups %xmm0, (%rsp)
+; CHECK-NEXT: callq goo
+; CHECK-NEXT: addq $24, %rsp
+; CHECK-NEXT: retq
+ %k = bitcast <16 x float>* @a to <2 x i256>*
+ %load = load <2 x i256>, <2 x i256>* %k, align 64
+ call void @goo(<2 x i256> %load)
+ ret void
+}
+
+attributes #0 = { nounwind "target-features"="+avx512bw" }
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