[PATCH] D46570: [AMDGPU] Optimzed old value for dpp if unused

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:7402-7418
+  case AMDGPU::V_MOV_B32_dpp: {
+    ConstantSDNode *RM = cast<ConstantSDNode>(Node->getOperand(3));
+    ConstantSDNode *BM = cast<ConstantSDNode>(Node->getOperand(4));
+    ConstantSDNode *BC = cast<ConstantSDNode>(Node->getOperand(5));
+    if (!BC->getZExtValue() ||
+        RM->getZExtValue() != 0xf || BM->getZExtValue() != 0xf)
+      break;
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rampitec wrote:
> rampitec wrote:
> > arsenm wrote:
> > > Can this be done earlier before selection?
> > Theoretically this can be done as early as in the AMDGPULibCalls. Unused old value can be replaced with undef.
> > 
> > Why do you think it is better? I do not see any optimization which may be done based on that. At the same time before the selection we have to work with an intrinsic and after we are working with the instruction itself. Given that we may have several intrinsics leading here in the future that maybe less code potentially.
> Please check D46596, it is InstCombine based implementation.
> It can be used separately or in conjunction with this one in case instruction [will] came from not from that intrinsic.
I really dislike doing anything in the awkward machine-selected DAG, and it's usually a last resort if nothing else works. Doing in the DAG or on the final machine instruction would be better if you think a later pass besides instcombine is helpful. Plus more code in the DAG is more code that needs to be rewritten on machine instructions in the future


https://reviews.llvm.org/D46570