[llvm] r332602 - [llvm-mca] add flag -all-views and flag -all-stats.

Andrea Di Biagio via llvm-commits llvm-commits at lists.llvm.org
Thu May 17 05:27:03 PDT 2018


Author: adibiagio
Date: Thu May 17 05:27:03 2018
New Revision: 332602

URL: http://llvm.org/viewvc/llvm-project?rev=332602&view=rev
Log:
[llvm-mca] add flag -all-views and flag -all-stats.

Flag -all-views enables all the views.
Flag -all-stats enables all the views that print hardware statistics.

Added:
    llvm/trunk/test/tools/llvm-mca/X86/option-all-stats-1.s
    llvm/trunk/test/tools/llvm-mca/X86/option-all-stats-2.s
    llvm/trunk/test/tools/llvm-mca/X86/option-all-views-1.s
    llvm/trunk/test/tools/llvm-mca/X86/option-all-views-2.s
Modified:
    llvm/trunk/docs/CommandGuide/llvm-mca.rst
    llvm/trunk/tools/llvm-mca/llvm-mca.cpp

Modified: llvm/trunk/docs/CommandGuide/llvm-mca.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-mca.rst?rev=332602&r1=332601&r2=332602&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-mca.rst (original)
+++ llvm/trunk/docs/CommandGuide/llvm-mca.rst Thu May 17 05:27:03 2018
@@ -176,6 +176,16 @@ option specifies "``-``", then the outpu
 
   Enable the instruction info view. This is enabled by default.
 
+.. option:: -all-stats
+
+  Print all hardware statistics. This enables extra statistics related to the
+  dispatch logic, the hardware schedulers, the register file(s), and the retire
+  control unit. This option is disabled by default.
+
+.. option:: -all-views
+
+  Enable all the view.
+
 .. option:: -instruction-tables
 
   Prints resource pressure information based on the static information

Added: llvm/trunk/test/tools/llvm-mca/X86/option-all-stats-1.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/option-all-stats-1.s?rev=332602&view=auto
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/option-all-stats-1.s (added)
+++ llvm/trunk/test/tools/llvm-mca/X86/option-all-stats-1.s Thu May 17 05:27:03 2018
@@ -0,0 +1,92 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-stats       < %s | FileCheck %s -check-prefix=ALL -check-prefix=FULLREPORT
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-stats=true  < %s | FileCheck %s -check-prefix=ALL -check-prefix=FULLREPORT
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-stats=false < %s | FileCheck %s -check-prefix=ALL
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2                  < %s | FileCheck %s -check-prefix=ALL
+
+add %eax, %eax
+
+# ALL:      Iterations:     100
+# ALL-NEXT: Instructions:   100
+# ALL-NEXT: Total Cycles:   103
+# ALL-NEXT: Dispatch Width: 2
+# ALL-NEXT: IPC:            0.97
+
+# ALL:      Instruction Info:
+# ALL-NEXT: [1]: #uOps
+# ALL-NEXT: [2]: Latency
+# ALL-NEXT: [3]: RThroughput
+# ALL-NEXT: [4]: MayLoad
+# ALL-NEXT: [5]: MayStore
+# ALL-NEXT: [6]: HasSideEffects
+
+# ALL:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# ALL-NEXT:  1      1     0.50                        addl	%eax, %eax
+
+# FULLREPORT:      Dynamic Dispatch Stall Cycles:
+# FULLREPORT-NEXT: RAT     - Register unavailable:                      0
+# FULLREPORT-NEXT: RCU     - Retire tokens unavailable:                 0
+# FULLREPORT-NEXT: SCHEDQ  - Scheduler full:                            61
+# FULLREPORT-NEXT: LQ      - Load queue full:                           0
+# FULLREPORT-NEXT: SQ      - Store queue full:                          0
+# FULLREPORT-NEXT: GROUP   - Static restrictions on the dispatch group: 0
+
+# FULLREPORT:      Dispatch Logic - number of cycles where we saw N instructions dispatched:
+# FULLREPORT-NEXT: [# dispatched], [# cycles]
+# FULLREPORT-NEXT:  0,              22  (21.4%)
+# FULLREPORT-NEXT:  2,              19  (18.4%)
+# FULLREPORT-NEXT:  1,              62  (60.2%)
+
+# FULLREPORT:      Schedulers - number of cycles where we saw N instructions issued:
+# FULLREPORT-NEXT: [# issued], [# cycles]
+# FULLREPORT-NEXT:  0,          3  (2.9%)
+# FULLREPORT-NEXT:  1,          100  (97.1%)
+
+# FULLREPORT:      Scheduler's queue usage:
+# FULLREPORT-NEXT: JALU01,  20/20
+# FULLREPORT-NEXT: JFPU01,  0/18
+# FULLREPORT-NEXT: JLSAGU,  0/12
+
+# FULLREPORT:      Retire Control Unit - number of cycles where we saw N instructions retired:
+# FULLREPORT-NEXT: [# retired], [# cycles]
+# FULLREPORT-NEXT:  0,           3  (2.9%)
+# FULLREPORT-NEXT:  1,           100  (97.1%)
+
+# FULLREPORT:      Register File statistics:
+# FULLREPORT-NEXT: Total number of mappings created:    200
+# FULLREPORT-NEXT: Max number of mappings used:         44
+
+# FULLREPORT:      *  Register File #1 -- FpuPRF:
+# FULLREPORT-NEXT:    Number of physical registers:     72
+# FULLREPORT-NEXT:    Total number of mappings created: 0
+# FULLREPORT-NEXT:    Max number of mappings used:      0
+
+# FULLREPORT:      *  Register File #2 -- IntegerPRF:
+# FULLREPORT-NEXT:    Number of physical registers:     64
+# FULLREPORT-NEXT:    Total number of mappings created: 200
+# FULLREPORT-NEXT:    Max number of mappings used:      44
+
+# FULLREPORT:      Resources:
+# FULLREPORT-NEXT: [0]   - JALU0
+# FULLREPORT-NEXT: [1]   - JALU1
+# FULLREPORT-NEXT: [2]   - JDiv
+# FULLREPORT-NEXT: [3]   - JFPA
+# FULLREPORT-NEXT: [4]   - JFPM
+# FULLREPORT-NEXT: [5]   - JFPU0
+# FULLREPORT-NEXT: [6]   - JFPU1
+# FULLREPORT-NEXT: [7]   - JLAGU
+# FULLREPORT-NEXT: [8]   - JMul
+# FULLREPORT-NEXT: [9]   - JSAGU
+# FULLREPORT-NEXT: [10]  - JSTC
+# FULLREPORT-NEXT: [11]  - JVALU0
+# FULLREPORT-NEXT: [12]  - JVALU1
+# FULLREPORT-NEXT: [13]  - JVIMUL
+
+# FULLREPORT:      Resource pressure per iteration:
+# FULLREPORT-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
+# FULLREPORT-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -
+
+# FULLREPORT:      Resource pressure by instruction:
+# FULLREPORT-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
+# FULLREPORT-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -     addl	%eax, %eax
+

Added: llvm/trunk/test/tools/llvm-mca/X86/option-all-stats-2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/option-all-stats-2.s?rev=332602&view=auto
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/option-all-stats-2.s (added)
+++ llvm/trunk/test/tools/llvm-mca/X86/option-all-stats-2.s Thu May 17 05:27:03 2018
@@ -0,0 +1,93 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-stats -dispatch-stats=false < %s | FileCheck %s -check-prefix=ALL
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-stats                       < %s | FileCheck %s -check-prefix=ALL -check-prefix=FULL
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-stats -dispatch-stats       < %s | FileCheck %s -check-prefix=ALL -check-prefix=FULL
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -dispatch-stats -all-stats       < %s | FileCheck %s -check-prefix=ALL -check-prefix=FULL
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -dispatch-stats=false -all-stats < %s | FileCheck %s -check-prefix=ALL -check-prefix=FULL
+
+add %eax, %eax
+
+# ALL:      Iterations:     100
+# ALL-NEXT: Instructions:   100
+# ALL-NEXT: Total Cycles:   103
+# ALL-NEXT: Dispatch Width: 2
+# ALL-NEXT: IPC:            0.97
+
+# ALL:      Instruction Info:
+# ALL-NEXT: [1]: #uOps
+# ALL-NEXT: [2]: Latency
+# ALL-NEXT: [3]: RThroughput
+# ALL-NEXT: [4]: MayLoad
+# ALL-NEXT: [5]: MayStore
+# ALL-NEXT: [6]: HasSideEffects
+
+# ALL:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# ALL-NEXT:  1      1     0.50                        addl	%eax, %eax
+
+# FULL:      Dynamic Dispatch Stall Cycles:
+# FULL-NEXT: RAT     - Register unavailable:                      0
+# FULL-NEXT: RCU     - Retire tokens unavailable:                 0
+# FULL-NEXT: SCHEDQ  - Scheduler full:                            61
+# FULL-NEXT: LQ      - Load queue full:                           0
+# FULL-NEXT: SQ      - Store queue full:                          0
+# FULL-NEXT: GROUP   - Static restrictions on the dispatch group: 0
+
+# FULL:      Dispatch Logic - number of cycles where we saw N instructions dispatched:
+# FULL-NEXT: [# dispatched], [# cycles]
+# FULL-NEXT:  0,              22  (21.4%)
+# FULL-NEXT:  2,              19  (18.4%)
+# FULL-NEXT:  1,              62  (60.2%)
+
+# FULL:      Schedulers - number of cycles where we saw N instructions issued:
+# FULL-NEXT: [# issued], [# cycles]
+# FULL-NEXT:  0,          3  (2.9%)
+# FULL-NEXT:  1,          100  (97.1%)
+
+# FULL:      Scheduler's queue usage:
+# FULL-NEXT: JALU01,  20/20
+# FULL-NEXT: JFPU01,  0/18
+# FULL-NEXT: JLSAGU,  0/12
+
+# FULL:      Retire Control Unit - number of cycles where we saw N instructions retired:
+# FULL-NEXT: [# retired], [# cycles]
+# FULL-NEXT:  0,           3  (2.9%)
+# FULL-NEXT:  1,           100  (97.1%)
+
+# FULL:      Register File statistics:
+# FULL-NEXT: Total number of mappings created:    200
+# FULL-NEXT: Max number of mappings used:         44
+
+# FULL:      *  Register File #1 -- FpuPRF:
+# FULL-NEXT:    Number of physical registers:     72
+# FULL-NEXT:    Total number of mappings created: 0
+# FULL-NEXT:    Max number of mappings used:      0
+
+# FULL:      *  Register File #2 -- IntegerPRF:
+# FULL-NEXT:    Number of physical registers:     64
+# FULL-NEXT:    Total number of mappings created: 200
+# FULL-NEXT:    Max number of mappings used:      44
+
+# FULL:      Resources:
+# FULL-NEXT: [0]   - JALU0
+# FULL-NEXT: [1]   - JALU1
+# FULL-NEXT: [2]   - JDiv
+# FULL-NEXT: [3]   - JFPA
+# FULL-NEXT: [4]   - JFPM
+# FULL-NEXT: [5]   - JFPU0
+# FULL-NEXT: [6]   - JFPU1
+# FULL-NEXT: [7]   - JLAGU
+# FULL-NEXT: [8]   - JMul
+# FULL-NEXT: [9]   - JSAGU
+# FULL-NEXT: [10]  - JSTC
+# FULL-NEXT: [11]  - JVALU0
+# FULL-NEXT: [12]  - JVALU1
+# FULL-NEXT: [13]  - JVIMUL
+
+# FULL:      Resource pressure per iteration:
+# FULL-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
+# FULL-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -
+
+# FULL:      Resource pressure by instruction:
+# FULL-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
+# FULL-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -     addl	%eax, %eax
+

Added: llvm/trunk/test/tools/llvm-mca/X86/option-all-views-1.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/option-all-views-1.s?rev=332602&view=auto
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/option-all-views-1.s (added)
+++ llvm/trunk/test/tools/llvm-mca/X86/option-all-views-1.s Thu May 17 05:27:03 2018
@@ -0,0 +1,116 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views       < %s | FileCheck %s -check-prefix=ALL -check-prefix=DEFAULTREPORT -check-prefix=FULLREPORT
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=true  < %s | FileCheck %s -check-prefix=ALL -check-prefix=DEFAULTREPORT -check-prefix=FULLREPORT
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOREPORT
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2                  < %s | FileCheck %s -check-prefix=ALL -check-prefix=DEFAULTREPORT
+
+add %eax, %eax
+
+# ALL:      Iterations:     100
+# ALL-NEXT: Instructions:   100
+# ALL-NEXT: Total Cycles:   103
+# ALL-NEXT: Dispatch Width: 2
+# ALL-NEXT: IPC:            0.97
+
+# DEFAULTREPORT:      Instruction Info:
+# DEFAULTREPORT-NEXT: [1]: #uOps
+# DEFAULTREPORT-NEXT: [2]: Latency
+# DEFAULTREPORT-NEXT: [3]: RThroughput
+# DEFAULTREPORT-NEXT: [4]: MayLoad
+# DEFAULTREPORT-NEXT: [5]: MayStore
+# DEFAULTREPORT-NEXT: [6]: HasSideEffects
+
+# DEFAULTREPORT:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# DEFAULTREPORT-NEXT:  1      1     0.50                        addl	%eax, %eax
+
+# FULLREPORT:      Dynamic Dispatch Stall Cycles:
+# FULLREPORT-NEXT: RAT     - Register unavailable:                      0
+# FULLREPORT-NEXT: RCU     - Retire tokens unavailable:                 0
+# FULLREPORT-NEXT: SCHEDQ  - Scheduler full:                            61
+# FULLREPORT-NEXT: LQ      - Load queue full:                           0
+# FULLREPORT-NEXT: SQ      - Store queue full:                          0
+# FULLREPORT-NEXT: GROUP   - Static restrictions on the dispatch group: 0
+
+# FULLREPORT:      Dispatch Logic - number of cycles where we saw N instructions dispatched:
+# FULLREPORT-NEXT: [# dispatched], [# cycles]
+# FULLREPORT-NEXT:  0,              22  (21.4%)
+# FULLREPORT-NEXT:  2,              19  (18.4%)
+# FULLREPORT-NEXT:  1,              62  (60.2%)
+
+# FULLREPORT:      Schedulers - number of cycles where we saw N instructions issued:
+# FULLREPORT-NEXT: [# issued], [# cycles]
+# FULLREPORT-NEXT:  0,          3  (2.9%)
+# FULLREPORT-NEXT:  1,          100  (97.1%)
+
+# FULLREPORT:      Scheduler's queue usage:
+# FULLREPORT-NEXT: JALU01,  20/20
+# FULLREPORT-NEXT: JFPU01,  0/18
+# FULLREPORT-NEXT: JLSAGU,  0/12
+
+# FULLREPORT:      Retire Control Unit - number of cycles where we saw N instructions retired:
+# FULLREPORT-NEXT: [# retired], [# cycles]
+# FULLREPORT-NEXT:  0,           3  (2.9%)
+# FULLREPORT-NEXT:  1,           100  (97.1%)
+
+# FULLREPORT:      Register File statistics:
+# FULLREPORT-NEXT: Total number of mappings created:    200
+# FULLREPORT-NEXT: Max number of mappings used:         44
+
+# FULLREPORT:      *  Register File #1 -- FpuPRF:
+# FULLREPORT-NEXT:    Number of physical registers:     72
+# FULLREPORT-NEXT:    Total number of mappings created: 0
+# FULLREPORT-NEXT:    Max number of mappings used:      0
+
+# FULLREPORT:      *  Register File #2 -- IntegerPRF:
+# FULLREPORT-NEXT:    Number of physical registers:     64
+# FULLREPORT-NEXT:    Total number of mappings created: 200
+# FULLREPORT-NEXT:    Max number of mappings used:      44
+
+# FULLREPORT:      Resources:
+# FULLREPORT-NEXT: [0]   - JALU0
+# FULLREPORT-NEXT: [1]   - JALU1
+# FULLREPORT-NEXT: [2]   - JDiv
+# FULLREPORT-NEXT: [3]   - JFPA
+# FULLREPORT-NEXT: [4]   - JFPM
+# FULLREPORT-NEXT: [5]   - JFPU0
+# FULLREPORT-NEXT: [6]   - JFPU1
+# FULLREPORT-NEXT: [7]   - JLAGU
+# FULLREPORT-NEXT: [8]   - JMul
+# FULLREPORT-NEXT: [9]   - JSAGU
+# FULLREPORT-NEXT: [10]  - JSTC
+# FULLREPORT-NEXT: [11]  - JVALU0
+# FULLREPORT-NEXT: [12]  - JVALU1
+# FULLREPORT-NEXT: [13]  - JVIMUL
+
+# FULLREPORT:      Resource pressure per iteration:
+# FULLREPORT-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
+# FULLREPORT-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -
+
+# FULLREPORT:      Resource pressure by instruction:
+# FULLREPORT-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
+# FULLREPORT-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -     addl	%eax, %eax
+
+# FULLREPORT:      Timeline view:
+# FULLREPORT-NEXT:                     012
+# FULLREPORT-NEXT: Index     0123456789
+
+# FULLREPORT:      [0,0]     DeER .    . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [1,0]     D=eER.    . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [2,0]     .D=eER    . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [3,0]     .D==eER   . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [4,0]     . D==eER  . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [5,0]     . D===eER . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [6,0]     .  D===eER. .   addl	%eax, %eax
+# FULLREPORT-NEXT: [7,0]     .  D====eER .   addl	%eax, %eax
+# FULLREPORT-NEXT: [8,0]     .   D====eER.   addl	%eax, %eax
+# FULLREPORT-NEXT: [9,0]     .   D=====eER   addl	%eax, %eax
+
+# FULLREPORT:      Average Wait times (based on the timeline view):
+# FULLREPORT-NEXT: [0]: Executions
+# FULLREPORT-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# FULLREPORT-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# FULLREPORT-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# FULLREPORT:            [0]    [1]    [2]    [3]
+# FULLREPORT-NEXT: 0.     10    3.5    0.1    0.0       addl	%eax, %eax
+

Added: llvm/trunk/test/tools/llvm-mca/X86/option-all-views-2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/option-all-views-2.s?rev=332602&view=auto
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/option-all-views-2.s (added)
+++ llvm/trunk/test/tools/llvm-mca/X86/option-all-views-2.s Thu May 17 05:27:03 2018
@@ -0,0 +1,141 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views                          < %s | FileCheck %s -check-prefix=ALL -check-prefix=FULLREPORT
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views -resource-pressure       < %s | FileCheck %s -check-prefix=ALL -check-prefix=FULLREPORT
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure -all-views       < %s | FileCheck %s -check-prefix=ALL -check-prefix=FULLREPORT
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure=false -all-views < %s | FileCheck %s -check-prefix=ALL -check-prefix=FULLREPORT
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=NORPV
+
+add %eax, %eax
+
+# ALL:      Iterations:     100
+# ALL-NEXT: Instructions:   100
+# ALL-NEXT: Total Cycles:   103
+# ALL-NEXT: Dispatch Width: 2
+# ALL-NEXT: IPC:            0.97
+
+# ALL:      Instruction Info:
+# ALL-NEXT: [1]: #uOps
+# ALL-NEXT: [2]: Latency
+# ALL-NEXT: [3]: RThroughput
+# ALL-NEXT: [4]: MayLoad
+# ALL-NEXT: [5]: MayStore
+# ALL-NEXT: [6]: HasSideEffects
+
+# ALL:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# ALL-NEXT:  1      1     0.50                        addl	%eax, %eax
+
+# ALL:      Dynamic Dispatch Stall Cycles:
+# ALL-NEXT: RAT     - Register unavailable:                      0
+# ALL-NEXT: RCU     - Retire tokens unavailable:                 0
+# ALL-NEXT: SCHEDQ  - Scheduler full:                            61
+# ALL-NEXT: LQ      - Load queue full:                           0
+# ALL-NEXT: SQ      - Store queue full:                          0
+# ALL-NEXT: GROUP   - Static restrictions on the dispatch group: 0
+
+# ALL:      Dispatch Logic - number of cycles where we saw N instructions dispatched:
+# ALL-NEXT: [# dispatched], [# cycles]
+# ALL-NEXT:  0,              22  (21.4%)
+# ALL-NEXT:  2,              19  (18.4%)
+# ALL-NEXT:  1,              62  (60.2%)
+
+# ALL:      Schedulers - number of cycles where we saw N instructions issued:
+# ALL-NEXT: [# issued], [# cycles]
+# ALL-NEXT:  0,          3  (2.9%)
+# ALL-NEXT:  1,          100  (97.1%)
+
+# ALL:      Scheduler's queue usage:
+# ALL-NEXT: JALU01,  20/20
+# ALL-NEXT: JFPU01,  0/18
+# ALL-NEXT: JLSAGU,  0/12
+
+# ALL:      Retire Control Unit - number of cycles where we saw N instructions retired:
+# ALL-NEXT: [# retired], [# cycles]
+# ALL-NEXT:  0,           3  (2.9%)
+# ALL-NEXT:  1,           100  (97.1%)
+
+# ALL:      Register File statistics:
+# ALL-NEXT: Total number of mappings created:    200
+# ALL-NEXT: Max number of mappings used:         44
+
+# ALL:      *  Register File #1 -- FpuPRF:
+# ALL-NEXT:    Number of physical registers:     72
+# ALL-NEXT:    Total number of mappings created: 0
+# ALL-NEXT:    Max number of mappings used:      0
+
+# ALL:      *  Register File #2 -- IntegerPRF:
+# ALL-NEXT:    Number of physical registers:     64
+# ALL-NEXT:    Total number of mappings created: 200
+# ALL-NEXT:    Max number of mappings used:      44
+
+# FULLREPORT:      Resources:
+# FULLREPORT-NEXT: [0]   - JALU0
+# FULLREPORT-NEXT: [1]   - JALU1
+# FULLREPORT-NEXT: [2]   - JDiv
+# FULLREPORT-NEXT: [3]   - JFPA
+# FULLREPORT-NEXT: [4]   - JFPM
+# FULLREPORT-NEXT: [5]   - JFPU0
+# FULLREPORT-NEXT: [6]   - JFPU1
+# FULLREPORT-NEXT: [7]   - JLAGU
+# FULLREPORT-NEXT: [8]   - JMul
+# FULLREPORT-NEXT: [9]   - JSAGU
+# FULLREPORT-NEXT: [10]  - JSTC
+# FULLREPORT-NEXT: [11]  - JVALU0
+# FULLREPORT-NEXT: [12]  - JVALU1
+# FULLREPORT-NEXT: [13]  - JVIMUL
+
+# NORPV:      Timeline view:
+# NORPV-NEXT:                     012
+# NORPV-NEXT: Index     0123456789
+
+# FULLREPORT:      Resource pressure per iteration:
+# FULLREPORT-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
+# FULLREPORT-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -
+
+# NORPV:      [0,0]     DeER .    . .   addl	%eax, %eax
+# NORPV-NEXT: [1,0]     D=eER.    . .   addl	%eax, %eax
+# NORPV-NEXT: [2,0]     .D=eER    . .   addl	%eax, %eax
+# NORPV-NEXT: [3,0]     .D==eER   . .   addl	%eax, %eax
+# NORPV-NEXT: [4,0]     . D==eER  . .   addl	%eax, %eax
+# NORPV-NEXT: [5,0]     . D===eER . .   addl	%eax, %eax
+# NORPV-NEXT: [6,0]     .  D===eER. .   addl	%eax, %eax
+# NORPV-NEXT: [7,0]     .  D====eER .   addl	%eax, %eax
+# NORPV-NEXT: [8,0]     .   D====eER.   addl	%eax, %eax
+# NORPV-NEXT: [9,0]     .   D=====eER   addl	%eax, %eax
+
+# NORPV:      Average Wait times (based on the timeline view):
+# NORPV-NEXT: [0]: Executions
+# NORPV-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# NORPV-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# NORPV-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# FULLREPORT:      Resource pressure by instruction:
+# FULLREPORT-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
+# FULLREPORT-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -     addl	%eax, %eax
+
+# NORPV:            [0]    [1]    [2]    [3]
+# NORPV-NEXT: 0.     10    3.5    0.1    0.0       addl	%eax, %eax
+
+# FULLREPORT:      Timeline view:
+# FULLREPORT-NEXT:                     012
+# FULLREPORT-NEXT: Index     0123456789
+
+# FULLREPORT:      [0,0]     DeER .    . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [1,0]     D=eER.    . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [2,0]     .D=eER    . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [3,0]     .D==eER   . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [4,0]     . D==eER  . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [5,0]     . D===eER . .   addl	%eax, %eax
+# FULLREPORT-NEXT: [6,0]     .  D===eER. .   addl	%eax, %eax
+# FULLREPORT-NEXT: [7,0]     .  D====eER .   addl	%eax, %eax
+# FULLREPORT-NEXT: [8,0]     .   D====eER.   addl	%eax, %eax
+# FULLREPORT-NEXT: [9,0]     .   D=====eER   addl	%eax, %eax
+
+# FULLREPORT:      Average Wait times (based on the timeline view):
+# FULLREPORT-NEXT: [0]: Executions
+# FULLREPORT-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# FULLREPORT-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# FULLREPORT-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# FULLREPORT:            [0]    [1]    [2]    [3]
+# FULLREPORT-NEXT: 0.     10    3.5    0.1    0.0       addl	%eax, %eax
+

Modified: llvm/trunk/tools/llvm-mca/llvm-mca.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/llvm-mca.cpp?rev=332602&r1=332601&r2=332602&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/llvm-mca.cpp (original)
+++ llvm/trunk/tools/llvm-mca/llvm-mca.cpp Thu May 17 05:27:03 2018
@@ -154,6 +154,15 @@ static cl::opt<bool> PrintInstructionInf
     cl::desc("Print the instruction info view (enabled by default)"),
     cl::cat(ViewOptions), cl::init(true));
 
+static cl::opt<bool> EnableAllStats("all-stats",
+                                    cl::desc("Print all hardware statistics"),
+                                    cl::cat(ViewOptions), cl::init(false));
+
+static cl::opt<bool>
+    EnableAllViews("all-views",
+                   cl::desc("Print all views including hardware statistics"),
+                   cl::cat(ViewOptions), cl::init(false));
+
 namespace {
 
 const Target *getTarget(const char *ProgName) {
@@ -273,6 +282,32 @@ public:
 };
 } // end of anonymous namespace
 
+static void processOptionImpl(cl::opt<bool> &O, const cl::opt<bool> &Default) {
+  if (!O.getNumOccurrences() || O.getPosition() < Default.getPosition())
+    O = Default.getValue();
+}
+
+static void processViewOptions() {
+  if (!EnableAllViews.getNumOccurrences() &&
+      !EnableAllStats.getNumOccurrences())
+    return;
+
+  if (EnableAllViews.getNumOccurrences()) {
+    processOptionImpl(PrintResourcePressureView, EnableAllViews);
+    processOptionImpl(PrintTimelineView, EnableAllViews);
+    processOptionImpl(PrintInstructionInfoView, EnableAllViews);
+  }
+
+  const cl::opt<bool> &Default =
+      EnableAllViews.getPosition() < EnableAllStats.getPosition()
+          ? EnableAllStats
+          : EnableAllViews;
+  processOptionImpl(PrintRegisterFileStats, Default);
+  processOptionImpl(PrintDispatchStats, Default);
+  processOptionImpl(PrintSchedulerStats, Default);
+  processOptionImpl(PrintRetireStats, Default);
+}
+
 int main(int argc, char **argv) {
   InitLLVM X(argc, argv);
 
@@ -309,6 +344,9 @@ int main(int argc, char **argv) {
     return 1;
   }
 
+  // Apply overrides to llvm-mca specific options.
+  processViewOptions();
+
   SourceMgr SrcMgr;
 
   // Tell SrcMgr about this buffer, which is what the parser will pick up.




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