[PATCH] D46954: [X86][SSE] Support v4i32 rotations (PR37426)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: test/CodeGen/X86/vector-rotate-128.ll:1599
+; AVX1-NEXT:    vpmuludq %xmm2, %xmm3, %xmm2
+; AVX1-NEXT:    vpmuludq %xmm1, %xmm0, %xmm0
+; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
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It might be better to take the cost of 2 loads to remove the 2xPSHUFD and fold directly into the PMULUDQs? There is a small increase in codesize.


Repository:
  rL LLVM

https://reviews.llvm.org/D46954