[PATCH] D46179: [X86] Lowering adds/addus/subs/subus intrinsics to native IR (LLVM part)

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

In https://reviews.llvm.org/D46179#1094156, @tkrupa wrote:

> Is there a machine instruction pass for combining?


I haven't been following this review, but I saw this question, and the answer is: yes.
See class MachineCombiner (pass name is shown as "Machine InstCombiner").


Repository:
  rL LLVM

https://reviews.llvm.org/D46179