[llvm] r332433 - [AArch64][SVE] Asm: Support for contiguous PRF prefetch instructions.
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Wed May 16 00:50:09 PDT 2018
Author: s.desmalen
Date: Wed May 16 00:50:09 2018
New Revision: 332433
URL: http://llvm.org/viewvc/llvm-project?rev=332433&view=rev
Log:
[AArch64][SVE] Asm: Support for contiguous PRF prefetch instructions.
Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D46682
Added:
llvm/trunk/test/MC/AArch64/SVE/prfb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/prfb.s
llvm/trunk/test/MC/AArch64/SVE/prfd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/prfd.s
llvm/trunk/test/MC/AArch64/SVE/prfh-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/prfh.s
llvm/trunk/test/MC/AArch64/SVE/prfw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/prfw.s
Modified:
llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td
llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td
llvm/trunk/test/MC/AArch64/basic-a64-diagnostics.s
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td?rev=332433&r1=332432&r2=332433&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td Wed May 16 00:50:09 2018
@@ -343,6 +343,14 @@ def uimm6s8 : Operand<i64>, ImmLeaf<i64,
let ParserMatchClass = UImm6s8Operand;
}
+// simm6sN predicate - True if the immediate is a multiple of N in the range
+// [-32 * N, 31 * N].
+def SImm6s1Operand : SImmScaledMemoryIndexed<6, 1>;
+def simm6s1 : Operand<i64>, ImmLeaf<i64, [{ return Imm >= -32 && Imm < 32; }]> {
+ let ParserMatchClass = SImm6s1Operand;
+ let DecoderMethod = "DecodeSImm<6>";
+}
+
// simm4sN predicate - True if the immediate is a multiple of N in the range
// [ -8* N, 7 * N].
def SImm4s1Operand : SImmScaledMemoryIndexed<4, 1>;
Modified: llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td?rev=332433&r1=332432&r2=332433&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td Wed May 16 00:50:09 2018
@@ -360,6 +360,18 @@ let Predicates = [HasSVE] in {
defm STR_ZXI : sve_mem_z_spill<"str">;
defm STR_PXI : sve_mem_p_spill<"str">;
+ // Contiguous prefetch (register + immediate)
+ defm PRFB_PRI : sve_mem_prfm_si<0b00, "prfb">;
+ defm PRFH_PRI : sve_mem_prfm_si<0b01, "prfh">;
+ defm PRFW_PRI : sve_mem_prfm_si<0b10, "prfw">;
+ defm PRFD_PRI : sve_mem_prfm_si<0b11, "prfd">;
+
+ // Contiguous prefetch (register + register)
+ def PRFB_PRR : sve_mem_prfm_ss<0b001, "prfb", GPR64NoXZRshifted8>;
+ def PRFH_PRR : sve_mem_prfm_ss<0b011, "prfh", GPR64NoXZRshifted16>;
+ def PRFS_PRR : sve_mem_prfm_ss<0b101, "prfw", GPR64NoXZRshifted32>;
+ def PRFD_PRR : sve_mem_prfm_ss<0b111, "prfd", GPR64NoXZRshifted64>;
+
defm ZIP1_ZZZ : sve_int_perm_bin_perm_zz<0b000, "zip1">;
defm ZIP2_ZZZ : sve_int_perm_bin_perm_zz<0b001, "zip2">;
Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=332433&r1=332432&r2=332433&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Wed May 16 00:50:09 2018
@@ -2087,13 +2087,13 @@ AArch64AsmParser::tryParsePrefetch(Opera
}
if (Tok.isNot(AsmToken::Identifier)) {
- TokError("pre-fetch hint expected");
+ TokError("prefetch hint expected");
return MatchOperand_ParseFail;
}
auto PRFM = LookupByName(Tok.getString());
if (!PRFM) {
- TokError("pre-fetch hint expected");
+ TokError("prefetch hint expected");
return MatchOperand_ParseFail;
}
@@ -3653,6 +3653,8 @@ bool AArch64AsmParser::showMatchError(SM
return Error(Loc, "index must be a multiple of 4 in range [-32, 28].");
case Match_InvalidMemoryIndexed16SImm4:
return Error(Loc, "index must be a multiple of 16 in range [-128, 112].");
+ case Match_InvalidMemoryIndexed1SImm6:
+ return Error(Loc, "index must be an integer in range [-32, 31].");
case Match_InvalidMemoryIndexedSImm9:
return Error(Loc, "index must be an integer in range [-256, 255].");
case Match_InvalidMemoryIndexed8SImm10:
@@ -4233,6 +4235,7 @@ bool AArch64AsmParser::MatchAndEmitInstr
case Match_InvalidMemoryIndexed2SImm4:
case Match_InvalidMemoryIndexed3SImm4:
case Match_InvalidMemoryIndexed4SImm4:
+ case Match_InvalidMemoryIndexed1SImm6:
case Match_InvalidMemoryIndexed16SImm4:
case Match_InvalidMemoryIndexed4SImm7:
case Match_InvalidMemoryIndexed8SImm7:
Modified: llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td?rev=332433&r1=332432&r2=332433&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td (original)
+++ llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td Wed May 16 00:50:09 2018
@@ -1251,6 +1251,58 @@ multiclass sve_mem_32b_gld_vi_32_ptrs<bi
(!cast<Instruction>(NAME # _IMM_REAL) Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0), 1>;
}
+class sve_mem_prfm_si<bits<2> msz, string asm>
+: I<(outs), (ins sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, simm6s1:$imm6),
+ asm, "\t$prfop, $Pg, [$Rn, $imm6, mul vl]",
+ "",
+ []>, Sched<[]> {
+ bits<5> Rn;
+ bits<3> Pg;
+ bits<6> imm6;
+ bits<4> prfop;
+ let Inst{31-22} = 0b1000010111;
+ let Inst{21-16} = imm6;
+ let Inst{15} = 0b0;
+ let Inst{14-13} = msz;
+ let Inst{12-10} = Pg;
+ let Inst{9-5} = Rn;
+ let Inst{4} = 0b0;
+ let Inst{3-0} = prfop;
+
+ let hasSideEffects = 1;
+}
+
+multiclass sve_mem_prfm_si<bits<2> msz, string asm> {
+ def NAME : sve_mem_prfm_si<msz, asm>;
+
+ def : InstAlias<asm # "\t$prfop, $Pg, [$Rn]",
+ (!cast<Instruction>(NAME) sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0), 1>;
+}
+
+class sve_mem_prfm_ss<bits<3> opc, string asm, RegisterOperand gprty>
+: I<(outs), (ins sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, gprty:$Rm),
+ asm, "\t$prfop, $Pg, [$Rn, $Rm]",
+ "",
+ []>, Sched<[]> {
+ bits<5> Rm;
+ bits<5> Rn;
+ bits<3> Pg;
+ bits<4> prfop;
+ let Inst{31-25} = 0b1000010;
+ let Inst{24-23} = opc{2-1};
+ let Inst{22-21} = 0b00;
+ let Inst{20-16} = Rm;
+ let Inst{15} = 0b1;
+ let Inst{14} = opc{0};
+ let Inst{13} = 0b0;
+ let Inst{12-10} = Pg;
+ let Inst{9-5} = Rn;
+ let Inst{4} = 0b0;
+ let Inst{3-0} = prfop;
+
+ let hasSideEffects = 1;
+}
+
class sve_mem_z_fill<string asm>
: I<(outs ZPRAny:$Zt), (ins GPR64sp:$Rn, simm9:$imm9),
asm, "\t$Zt, [$Rn, $imm9, mul vl]",
Added: llvm/trunk/test/MC/AArch64/SVE/prfb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfb-diagnostics.s?rev=332433&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfb-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/prfb-diagnostics.s Wed May 16 00:50:09 2018
@@ -0,0 +1,63 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+
+// --------------------------------------------------------------------------//
+// invalid/missing predicate operation specifier
+
+prfb p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
+// CHECK-NEXT: prfb p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfb #16, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch operand out of range, [0,15] expected
+// CHECK-NEXT: prfb #16, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfb plil1keep, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
+// CHECK-NEXT: prfb plil1keep, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfb #pldl1keep, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate value expected for prefetch operand
+// CHECK-NEXT: prfb #pldl1keep, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// invalid addressing modes
+
+prfb #0, p0, [x0, #-33, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
+// CHECK-NEXT: prfb #0, p0, [x0, #-33, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfb #0, p0, [x0, #32, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
+// CHECK-NEXT: prfb #0, p0, [x0, #32, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfb #0, p0, [x0, w0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
+// CHECK-NEXT: prfb #0, p0, [x0, w0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfb #0, p0, [x0, x0, uxtw]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
+// CHECK-NEXT: prfb #0, p0, [x0, x0, uxtw]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfb #0, p0, [x0, x0, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
+// CHECK-NEXT: prfb #0, p0, [x0, x0, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// invalid predicate
+
+prfb #0, p8, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: prfb #0, p8, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/prfb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfb.s?rev=332433&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfb.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/prfb.s Wed May 16 00:50:09 2018
@@ -0,0 +1,194 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+// --------------------------------------------------------------------------//
+// Test all possible prefetch operation specifiers
+
+prfb #0, p0, [x0]
+// CHECK-INST: prfb pldl1keep, p0, [x0]
+// CHECK-ENCODING: [0x00,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 00 c0 85 <unknown>
+
+prfb pldl1keep, p0, [x0]
+// CHECK-INST: prfb pldl1keep, p0, [x0]
+// CHECK-ENCODING: [0x00,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 00 c0 85 <unknown>
+
+prfb #1, p0, [x0]
+// CHECK-INST: prfb pldl1strm, p0, [x0]
+// CHECK-ENCODING: [0x01,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 00 c0 85 <unknown>
+
+prfb pldl1strm, p0, [x0]
+// CHECK-INST: prfb pldl1strm, p0, [x0]
+// CHECK-ENCODING: [0x01,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 00 c0 85 <unknown>
+
+prfb #2, p0, [x0]
+// CHECK-INST: prfb pldl2keep, p0, [x0]
+// CHECK-ENCODING: [0x02,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 02 00 c0 85 <unknown>
+
+prfb pldl2keep, p0, [x0]
+// CHECK-INST: prfb pldl2keep, p0, [x0]
+// CHECK-ENCODING: [0x02,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 02 00 c0 85 <unknown>
+
+prfb #3, p0, [x0]
+// CHECK-INST: prfb pldl2strm, p0, [x0]
+// CHECK-ENCODING: [0x03,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 03 00 c0 85 <unknown>
+
+prfb pldl2strm, p0, [x0]
+// CHECK-INST: prfb pldl2strm, p0, [x0]
+// CHECK-ENCODING: [0x03,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 03 00 c0 85 <unknown>
+
+prfb #4, p0, [x0]
+// CHECK-INST: prfb pldl3keep, p0, [x0]
+// CHECK-ENCODING: [0x04,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 04 00 c0 85 <unknown>
+
+prfb pldl3keep, p0, [x0]
+// CHECK-INST: prfb pldl3keep, p0, [x0]
+// CHECK-ENCODING: [0x04,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 04 00 c0 85 <unknown>
+
+prfb #5, p0, [x0]
+// CHECK-INST: prfb pldl3strm, p0, [x0]
+// CHECK-ENCODING: [0x05,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 00 c0 85 <unknown>
+
+prfb pldl3strm, p0, [x0]
+// CHECK-INST: prfb pldl3strm, p0, [x0]
+// CHECK-ENCODING: [0x05,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 00 c0 85 <unknown>
+
+prfb #6, p0, [x0]
+// CHECK-INST: prfb #6, p0, [x0]
+// CHECK-ENCODING: [0x06,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 06 00 c0 85 <unknown>
+
+prfb #7, p0, [x0]
+// CHECK-INST: prfb #7, p0, [x0]
+// CHECK-ENCODING: [0x07,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 07 00 c0 85 <unknown>
+
+prfb #8, p0, [x0]
+// CHECK-INST: prfb pstl1keep, p0, [x0]
+// CHECK-ENCODING: [0x08,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 08 00 c0 85 <unknown>
+
+prfb pstl1keep, p0, [x0]
+// CHECK-INST: prfb pstl1keep, p0, [x0]
+// CHECK-ENCODING: [0x08,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 08 00 c0 85 <unknown>
+
+prfb #9, p0, [x0]
+// CHECK-INST: prfb pstl1strm, p0, [x0]
+// CHECK-ENCODING: [0x09,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 09 00 c0 85 <unknown>
+
+prfb pstl1strm, p0, [x0]
+// CHECK-INST: prfb pstl1strm, p0, [x0]
+// CHECK-ENCODING: [0x09,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 09 00 c0 85 <unknown>
+
+prfb #10, p0, [x0]
+// CHECK-INST: prfb pstl2keep, p0, [x0]
+// CHECK-ENCODING: [0x0a,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0a 00 c0 85 <unknown>
+
+prfb pstl2keep, p0, [x0]
+// CHECK-INST: prfb pstl2keep, p0, [x0]
+// CHECK-ENCODING: [0x0a,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0a 00 c0 85 <unknown>
+
+prfb #11, p0, [x0]
+// CHECK-INST: prfb pstl2strm, p0, [x0]
+// CHECK-ENCODING: [0x0b,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0b 00 c0 85 <unknown>
+
+prfb pstl2strm, p0, [x0]
+// CHECK-INST: prfb pstl2strm, p0, [x0]
+// CHECK-ENCODING: [0x0b,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0b 00 c0 85 <unknown>
+
+prfb #12, p0, [x0]
+// CHECK-INST: prfb pstl3keep, p0, [x0]
+// CHECK-ENCODING: [0x0c,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0c 00 c0 85 <unknown>
+
+prfb pstl3keep, p0, [x0]
+// CHECK-INST: prfb pstl3keep, p0, [x0]
+// CHECK-ENCODING: [0x0c,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0c 00 c0 85 <unknown>
+
+prfb #13, p0, [x0]
+// CHECK-INST: prfb pstl3strm, p0, [x0]
+// CHECK-ENCODING: [0x0d,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0d 00 c0 85 <unknown>
+
+prfb pstl3strm, p0, [x0]
+// CHECK-INST: prfb pstl3strm, p0, [x0]
+// CHECK-ENCODING: [0x0d,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0d 00 c0 85 <unknown>
+
+prfb #14, p0, [x0]
+// CHECK-INST: prfb #14, p0, [x0]
+// CHECK-ENCODING: [0x0e,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0e 00 c0 85 <unknown>
+
+prfb #15, p0, [x0]
+// CHECK-INST: prfb #15, p0, [x0]
+// CHECK-ENCODING: [0x0f,0x00,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0f 00 c0 85 <unknown>
+
+// --------------------------------------------------------------------------//
+// Test addressing modes
+
+prfb #1, p0, [x0, #-32, mul vl]
+// CHECK-INST: prfb pldl1strm, p0, [x0, #-32, mul vl]
+// CHECK-ENCODING: [0x01,0x00,0xe0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 00 e0 85 <unknown>
+
+prfb #1, p0, [x0, #31, mul vl]
+// CHECK-INST: prfb pldl1strm, p0, [x0, #31, mul vl]
+// CHECK-ENCODING: [0x01,0x00,0xdf,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 00 df 85 <unknown>
Added: llvm/trunk/test/MC/AArch64/SVE/prfd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfd-diagnostics.s?rev=332433&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfd-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/prfd-diagnostics.s Wed May 16 00:50:09 2018
@@ -0,0 +1,63 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+
+// --------------------------------------------------------------------------//
+// invalid/missing predicate operation specifier
+
+prfd p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
+// CHECK-NEXT: prfd p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfd #16, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch operand out of range, [0,15] expected
+// CHECK-NEXT: prfd #16, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfd plil1keep, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
+// CHECK-NEXT: prfd plil1keep, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfd #pldl1keep, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate value expected for prefetch operand
+// CHECK-NEXT: prfd #pldl1keep, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// invalid addressing modes
+
+prfd #0, p0, [x0, #-33, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
+// CHECK-NEXT: prfd #0, p0, [x0, #-33, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfd #0, p0, [x0, #32, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
+// CHECK-NEXT: prfd #0, p0, [x0, #32, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfd #0, p0, [x0, w0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3'
+// CHECK-NEXT: prfd #0, p0, [x0, w0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfd #0, p0, [x0, x0, uxtw]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3'
+// CHECK-NEXT: prfd #0, p0, [x0, x0, uxtw]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfd #0, p0, [x0, x0, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3'
+// CHECK-NEXT: prfd #0, p0, [x0, x0, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// invalid predicate
+
+prfd #0, p8, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: prfd #0, p8, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/prfd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfd.s?rev=332433&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfd.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/prfd.s Wed May 16 00:50:09 2018
@@ -0,0 +1,194 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+// --------------------------------------------------------------------------//
+// Test all possible prefetch operation specifiers
+
+prfd #0, p0, [x0]
+// CHECK-INST: prfd pldl1keep, p0, [x0]
+// CHECK-ENCODING: [0x00,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 60 c0 85 <unknown>
+
+prfd pldl1keep, p0, [x0]
+// CHECK-INST: prfd pldl1keep, p0, [x0]
+// CHECK-ENCODING: [0x00,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 60 c0 85 <unknown>
+
+prfd #1, p0, [x0]
+// CHECK-INST: prfd pldl1strm, p0, [x0]
+// CHECK-ENCODING: [0x01,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 60 c0 85 <unknown>
+
+prfd pldl1strm, p0, [x0]
+// CHECK-INST: prfd pldl1strm, p0, [x0]
+// CHECK-ENCODING: [0x01,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 60 c0 85 <unknown>
+
+prfd #2, p0, [x0]
+// CHECK-INST: prfd pldl2keep, p0, [x0]
+// CHECK-ENCODING: [0x02,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 02 60 c0 85 <unknown>
+
+prfd pldl2keep, p0, [x0]
+// CHECK-INST: prfd pldl2keep, p0, [x0]
+// CHECK-ENCODING: [0x02,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 02 60 c0 85 <unknown>
+
+prfd #3, p0, [x0]
+// CHECK-INST: prfd pldl2strm, p0, [x0]
+// CHECK-ENCODING: [0x03,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 03 60 c0 85 <unknown>
+
+prfd pldl2strm, p0, [x0]
+// CHECK-INST: prfd pldl2strm, p0, [x0]
+// CHECK-ENCODING: [0x03,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 03 60 c0 85 <unknown>
+
+prfd #4, p0, [x0]
+// CHECK-INST: prfd pldl3keep, p0, [x0]
+// CHECK-ENCODING: [0x04,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 04 60 c0 85 <unknown>
+
+prfd pldl3keep, p0, [x0]
+// CHECK-INST: prfd pldl3keep, p0, [x0]
+// CHECK-ENCODING: [0x04,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 04 60 c0 85 <unknown>
+
+prfd #5, p0, [x0]
+// CHECK-INST: prfd pldl3strm, p0, [x0]
+// CHECK-ENCODING: [0x05,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 60 c0 85 <unknown>
+
+prfd pldl3strm, p0, [x0]
+// CHECK-INST: prfd pldl3strm, p0, [x0]
+// CHECK-ENCODING: [0x05,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 60 c0 85 <unknown>
+
+prfd #6, p0, [x0]
+// CHECK-INST: prfd #6, p0, [x0]
+// CHECK-ENCODING: [0x06,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 06 60 c0 85 <unknown>
+
+prfd #7, p0, [x0]
+// CHECK-INST: prfd #7, p0, [x0]
+// CHECK-ENCODING: [0x07,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 07 60 c0 85 <unknown>
+
+prfd #8, p0, [x0]
+// CHECK-INST: prfd pstl1keep, p0, [x0]
+// CHECK-ENCODING: [0x08,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 08 60 c0 85 <unknown>
+
+prfd pstl1keep, p0, [x0]
+// CHECK-INST: prfd pstl1keep, p0, [x0]
+// CHECK-ENCODING: [0x08,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 08 60 c0 85 <unknown>
+
+prfd #9, p0, [x0]
+// CHECK-INST: prfd pstl1strm, p0, [x0]
+// CHECK-ENCODING: [0x09,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 09 60 c0 85 <unknown>
+
+prfd pstl1strm, p0, [x0]
+// CHECK-INST: prfd pstl1strm, p0, [x0]
+// CHECK-ENCODING: [0x09,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 09 60 c0 85 <unknown>
+
+prfd #10, p0, [x0]
+// CHECK-INST: prfd pstl2keep, p0, [x0]
+// CHECK-ENCODING: [0x0a,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0a 60 c0 85 <unknown>
+
+prfd pstl2keep, p0, [x0]
+// CHECK-INST: prfd pstl2keep, p0, [x0]
+// CHECK-ENCODING: [0x0a,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0a 60 c0 85 <unknown>
+
+prfd #11, p0, [x0]
+// CHECK-INST: prfd pstl2strm, p0, [x0]
+// CHECK-ENCODING: [0x0b,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0b 60 c0 85 <unknown>
+
+prfd pstl2strm, p0, [x0]
+// CHECK-INST: prfd pstl2strm, p0, [x0]
+// CHECK-ENCODING: [0x0b,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0b 60 c0 85 <unknown>
+
+prfd #12, p0, [x0]
+// CHECK-INST: prfd pstl3keep, p0, [x0]
+// CHECK-ENCODING: [0x0c,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0c 60 c0 85 <unknown>
+
+prfd pstl3keep, p0, [x0]
+// CHECK-INST: prfd pstl3keep, p0, [x0]
+// CHECK-ENCODING: [0x0c,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0c 60 c0 85 <unknown>
+
+prfd #13, p0, [x0]
+// CHECK-INST: prfd pstl3strm, p0, [x0]
+// CHECK-ENCODING: [0x0d,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0d 60 c0 85 <unknown>
+
+prfd pstl3strm, p0, [x0]
+// CHECK-INST: prfd pstl3strm, p0, [x0]
+// CHECK-ENCODING: [0x0d,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0d 60 c0 85 <unknown>
+
+prfd #14, p0, [x0]
+// CHECK-INST: prfd #14, p0, [x0]
+// CHECK-ENCODING: [0x0e,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0e 60 c0 85 <unknown>
+
+prfd #15, p0, [x0]
+// CHECK-INST: prfd #15, p0, [x0]
+// CHECK-ENCODING: [0x0f,0x60,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0f 60 c0 85 <unknown>
+
+// --------------------------------------------------------------------------//
+// Test addressing modes
+
+prfd pldl1strm, p0, [x0, #-32, mul vl]
+// CHECK-INST: prfd pldl1strm, p0, [x0, #-32, mul vl]
+// CHECK-ENCODING: [0x01,0x60,0xe0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 60 e0 85
+
+prfd pldl1strm, p0, [x0, #31, mul vl]
+// CHECK-INST: prfd pldl1strm, p0, [x0, #31, mul vl]
+// CHECK-ENCODING: [0x01,0x60,0xdf,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 60 df 85
Added: llvm/trunk/test/MC/AArch64/SVE/prfh-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfh-diagnostics.s?rev=332433&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfh-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/prfh-diagnostics.s Wed May 16 00:50:09 2018
@@ -0,0 +1,63 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+
+// --------------------------------------------------------------------------//
+// invalid/missing predicate operation specifier
+
+prfh p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
+// CHECK-NEXT: prfh p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfh #16, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch operand out of range, [0,15] expected
+// CHECK-NEXT: prfh #16, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfh plil1keep, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
+// CHECK-NEXT: prfh plil1keep, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfh #pldl1keep, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate value expected for prefetch operand
+// CHECK-NEXT: prfh #pldl1keep, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// invalid addressing modes
+
+prfh #0, p0, [x0, #-33, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
+// CHECK-NEXT: prfh #0, p0, [x0, #-33, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfh #0, p0, [x0, #32, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
+// CHECK-NEXT: prfh #0, p0, [x0, #32, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfh #0, p0, [x0, w0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1'
+// CHECK-NEXT: prfh #0, p0, [x0, w0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfh #0, p0, [x0, x0, uxtw]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1'
+// CHECK-NEXT: prfh #0, p0, [x0, x0, uxtw]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfh #0, p0, [x0, x0, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1'
+// CHECK-NEXT: prfh #0, p0, [x0, x0, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// invalid predicate
+
+prfh #0, p8, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: prfh #0, p8, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/prfh.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfh.s?rev=332433&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfh.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/prfh.s Wed May 16 00:50:09 2018
@@ -0,0 +1,194 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+// --------------------------------------------------------------------------//
+// Test all possible prefetch operation specifiers
+
+prfh #0, p0, [x0]
+// CHECK-INST: prfh pldl1keep, p0, [x0]
+// CHECK-ENCODING: [0x00,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 20 c0 85 <unknown>
+
+prfh pldl1keep, p0, [x0]
+// CHECK-INST: prfh pldl1keep, p0, [x0]
+// CHECK-ENCODING: [0x00,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 20 c0 85 <unknown>
+
+prfh #1, p0, [x0]
+// CHECK-INST: prfh pldl1strm, p0, [x0]
+// CHECK-ENCODING: [0x01,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 20 c0 85 <unknown>
+
+prfh pldl1strm, p0, [x0]
+// CHECK-INST: prfh pldl1strm, p0, [x0]
+// CHECK-ENCODING: [0x01,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 20 c0 85 <unknown>
+
+prfh #2, p0, [x0]
+// CHECK-INST: prfh pldl2keep, p0, [x0]
+// CHECK-ENCODING: [0x02,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 02 20 c0 85 <unknown>
+
+prfh pldl2keep, p0, [x0]
+// CHECK-INST: prfh pldl2keep, p0, [x0]
+// CHECK-ENCODING: [0x02,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 02 20 c0 85 <unknown>
+
+prfh #3, p0, [x0]
+// CHECK-INST: prfh pldl2strm, p0, [x0]
+// CHECK-ENCODING: [0x03,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 03 20 c0 85 <unknown>
+
+prfh pldl2strm, p0, [x0]
+// CHECK-INST: prfh pldl2strm, p0, [x0]
+// CHECK-ENCODING: [0x03,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 03 20 c0 85 <unknown>
+
+prfh #4, p0, [x0]
+// CHECK-INST: prfh pldl3keep, p0, [x0]
+// CHECK-ENCODING: [0x04,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 04 20 c0 85 <unknown>
+
+prfh pldl3keep, p0, [x0]
+// CHECK-INST: prfh pldl3keep, p0, [x0]
+// CHECK-ENCODING: [0x04,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 04 20 c0 85 <unknown>
+
+prfh #5, p0, [x0]
+// CHECK-INST: prfh pldl3strm, p0, [x0]
+// CHECK-ENCODING: [0x05,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 20 c0 85 <unknown>
+
+prfh pldl3strm, p0, [x0]
+// CHECK-INST: prfh pldl3strm, p0, [x0]
+// CHECK-ENCODING: [0x05,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 20 c0 85 <unknown>
+
+prfh #6, p0, [x0]
+// CHECK-INST: prfh #6, p0, [x0]
+// CHECK-ENCODING: [0x06,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 06 20 c0 85 <unknown>
+
+prfh #7, p0, [x0]
+// CHECK-INST: prfh #7, p0, [x0]
+// CHECK-ENCODING: [0x07,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 07 20 c0 85 <unknown>
+
+prfh #8, p0, [x0]
+// CHECK-INST: prfh pstl1keep, p0, [x0]
+// CHECK-ENCODING: [0x08,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 08 20 c0 85 <unknown>
+
+prfh pstl1keep, p0, [x0]
+// CHECK-INST: prfh pstl1keep, p0, [x0]
+// CHECK-ENCODING: [0x08,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 08 20 c0 85 <unknown>
+
+prfh #9, p0, [x0]
+// CHECK-INST: prfh pstl1strm, p0, [x0]
+// CHECK-ENCODING: [0x09,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 09 20 c0 85 <unknown>
+
+prfh pstl1strm, p0, [x0]
+// CHECK-INST: prfh pstl1strm, p0, [x0]
+// CHECK-ENCODING: [0x09,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 09 20 c0 85 <unknown>
+
+prfh #10, p0, [x0]
+// CHECK-INST: prfh pstl2keep, p0, [x0]
+// CHECK-ENCODING: [0x0a,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0a 20 c0 85 <unknown>
+
+prfh pstl2keep, p0, [x0]
+// CHECK-INST: prfh pstl2keep, p0, [x0]
+// CHECK-ENCODING: [0x0a,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0a 20 c0 85 <unknown>
+
+prfh #11, p0, [x0]
+// CHECK-INST: prfh pstl2strm, p0, [x0]
+// CHECK-ENCODING: [0x0b,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0b 20 c0 85 <unknown>
+
+prfh pstl2strm, p0, [x0]
+// CHECK-INST: prfh pstl2strm, p0, [x0]
+// CHECK-ENCODING: [0x0b,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0b 20 c0 85 <unknown>
+
+prfh #12, p0, [x0]
+// CHECK-INST: prfh pstl3keep, p0, [x0]
+// CHECK-ENCODING: [0x0c,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0c 20 c0 85 <unknown>
+
+prfh pstl3keep, p0, [x0]
+// CHECK-INST: prfh pstl3keep, p0, [x0]
+// CHECK-ENCODING: [0x0c,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0c 20 c0 85 <unknown>
+
+prfh #13, p0, [x0]
+// CHECK-INST: prfh pstl3strm, p0, [x0]
+// CHECK-ENCODING: [0x0d,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0d 20 c0 85 <unknown>
+
+prfh pstl3strm, p0, [x0]
+// CHECK-INST: prfh pstl3strm, p0, [x0]
+// CHECK-ENCODING: [0x0d,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0d 20 c0 85 <unknown>
+
+prfh #14, p0, [x0]
+// CHECK-INST: prfh #14, p0, [x0]
+// CHECK-ENCODING: [0x0e,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0e 20 c0 85 <unknown>
+
+prfh #15, p0, [x0]
+// CHECK-INST: prfh #15, p0, [x0]
+// CHECK-ENCODING: [0x0f,0x20,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0f 20 c0 85 <unknown>
+
+// --------------------------------------------------------------------------//
+// Test addressing modes
+
+prfh pldl1strm, p0, [x0, #-32, mul vl]
+// CHECK-INST: prfh pldl1strm, p0, [x0, #-32, mul vl]
+// CHECK-ENCODING: [0x01,0x20,0xe0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 20 e0 85
+
+prfh pldl1strm, p0, [x0, #31, mul vl]
+// CHECK-INST: prfh pldl1strm, p0, [x0, #31, mul vl]
+// CHECK-ENCODING: [0x01,0x20,0xdf,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 20 df 85
Added: llvm/trunk/test/MC/AArch64/SVE/prfw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfw-diagnostics.s?rev=332433&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfw-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/prfw-diagnostics.s Wed May 16 00:50:09 2018
@@ -0,0 +1,63 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+
+// --------------------------------------------------------------------------//
+// invalid/missing predicate operation specifier
+
+prfw p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
+// CHECK-NEXT: prfw p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfw #16, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch operand out of range, [0,15] expected
+// CHECK-NEXT: prfw #16, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfw plil1keep, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
+// CHECK-NEXT: prfw plil1keep, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfw #pldl1keep, p0, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate value expected for prefetch operand
+// CHECK-NEXT: prfw #pldl1keep, p0, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// invalid addressing modes
+
+prfw #0, p0, [x0, #-33, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
+// CHECK-NEXT: prfw #0, p0, [x0, #-33, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfw #0, p0, [x0, #32, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
+// CHECK-NEXT: prfw #0, p0, [x0, #32, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfw #0, p0, [x0, w0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2'
+// CHECK-NEXT: prfw #0, p0, [x0, w0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfw #0, p0, [x0, x0, uxtw]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2'
+// CHECK-NEXT: prfw #0, p0, [x0, x0, uxtw]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+prfw #0, p0, [x0, x0, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2'
+// CHECK-NEXT: prfw #0, p0, [x0, x0, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// invalid predicate
+
+prfw #0, p8, [x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: prfw #0, p8, [x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/prfw.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfw.s?rev=332433&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfw.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/prfw.s Wed May 16 00:50:09 2018
@@ -0,0 +1,194 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+// --------------------------------------------------------------------------//
+// Test all possible prefetch operation specifiers
+
+prfw #0, p0, [x0]
+// CHECK-INST: prfw pldl1keep, p0, [x0]
+// CHECK-ENCODING: [0x00,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 40 c0 85 <unknown>
+
+prfw pldl1keep, p0, [x0]
+// CHECK-INST: prfw pldl1keep, p0, [x0]
+// CHECK-ENCODING: [0x00,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 40 c0 85 <unknown>
+
+prfw #1, p0, [x0]
+// CHECK-INST: prfw pldl1strm, p0, [x0]
+// CHECK-ENCODING: [0x01,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 40 c0 85 <unknown>
+
+prfw pldl1strm, p0, [x0]
+// CHECK-INST: prfw pldl1strm, p0, [x0]
+// CHECK-ENCODING: [0x01,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 40 c0 85 <unknown>
+
+prfw #2, p0, [x0]
+// CHECK-INST: prfw pldl2keep, p0, [x0]
+// CHECK-ENCODING: [0x02,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 02 40 c0 85 <unknown>
+
+prfw pldl2keep, p0, [x0]
+// CHECK-INST: prfw pldl2keep, p0, [x0]
+// CHECK-ENCODING: [0x02,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 02 40 c0 85 <unknown>
+
+prfw #3, p0, [x0]
+// CHECK-INST: prfw pldl2strm, p0, [x0]
+// CHECK-ENCODING: [0x03,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 03 40 c0 85 <unknown>
+
+prfw pldl2strm, p0, [x0]
+// CHECK-INST: prfw pldl2strm, p0, [x0]
+// CHECK-ENCODING: [0x03,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 03 40 c0 85 <unknown>
+
+prfw #4, p0, [x0]
+// CHECK-INST: prfw pldl3keep, p0, [x0]
+// CHECK-ENCODING: [0x04,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 04 40 c0 85 <unknown>
+
+prfw pldl3keep, p0, [x0]
+// CHECK-INST: prfw pldl3keep, p0, [x0]
+// CHECK-ENCODING: [0x04,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 04 40 c0 85 <unknown>
+
+prfw #5, p0, [x0]
+// CHECK-INST: prfw pldl3strm, p0, [x0]
+// CHECK-ENCODING: [0x05,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 40 c0 85 <unknown>
+
+prfw pldl3strm, p0, [x0]
+// CHECK-INST: prfw pldl3strm, p0, [x0]
+// CHECK-ENCODING: [0x05,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 40 c0 85 <unknown>
+
+prfw #6, p0, [x0]
+// CHECK-INST: prfw #6, p0, [x0]
+// CHECK-ENCODING: [0x06,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 06 40 c0 85 <unknown>
+
+prfw #7, p0, [x0]
+// CHECK-INST: prfw #7, p0, [x0]
+// CHECK-ENCODING: [0x07,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 07 40 c0 85 <unknown>
+
+prfw #8, p0, [x0]
+// CHECK-INST: prfw pstl1keep, p0, [x0]
+// CHECK-ENCODING: [0x08,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 08 40 c0 85 <unknown>
+
+prfw pstl1keep, p0, [x0]
+// CHECK-INST: prfw pstl1keep, p0, [x0]
+// CHECK-ENCODING: [0x08,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 08 40 c0 85 <unknown>
+
+prfw #9, p0, [x0]
+// CHECK-INST: prfw pstl1strm, p0, [x0]
+// CHECK-ENCODING: [0x09,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 09 40 c0 85 <unknown>
+
+prfw pstl1strm, p0, [x0]
+// CHECK-INST: prfw pstl1strm, p0, [x0]
+// CHECK-ENCODING: [0x09,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 09 40 c0 85 <unknown>
+
+prfw #10, p0, [x0]
+// CHECK-INST: prfw pstl2keep, p0, [x0]
+// CHECK-ENCODING: [0x0a,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0a 40 c0 85 <unknown>
+
+prfw pstl2keep, p0, [x0]
+// CHECK-INST: prfw pstl2keep, p0, [x0]
+// CHECK-ENCODING: [0x0a,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0a 40 c0 85 <unknown>
+
+prfw #11, p0, [x0]
+// CHECK-INST: prfw pstl2strm, p0, [x0]
+// CHECK-ENCODING: [0x0b,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0b 40 c0 85 <unknown>
+
+prfw pstl2strm, p0, [x0]
+// CHECK-INST: prfw pstl2strm, p0, [x0]
+// CHECK-ENCODING: [0x0b,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0b 40 c0 85 <unknown>
+
+prfw #12, p0, [x0]
+// CHECK-INST: prfw pstl3keep, p0, [x0]
+// CHECK-ENCODING: [0x0c,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0c 40 c0 85 <unknown>
+
+prfw pstl3keep, p0, [x0]
+// CHECK-INST: prfw pstl3keep, p0, [x0]
+// CHECK-ENCODING: [0x0c,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0c 40 c0 85 <unknown>
+
+prfw #13, p0, [x0]
+// CHECK-INST: prfw pstl3strm, p0, [x0]
+// CHECK-ENCODING: [0x0d,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0d 40 c0 85 <unknown>
+
+prfw pstl3strm, p0, [x0]
+// CHECK-INST: prfw pstl3strm, p0, [x0]
+// CHECK-ENCODING: [0x0d,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0d 40 c0 85 <unknown>
+
+prfw #14, p0, [x0]
+// CHECK-INST: prfw #14, p0, [x0]
+// CHECK-ENCODING: [0x0e,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0e 40 c0 85 <unknown>
+
+prfw #15, p0, [x0]
+// CHECK-INST: prfw #15, p0, [x0]
+// CHECK-ENCODING: [0x0f,0x40,0xc0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 0f 40 c0 85 <unknown>
+
+// --------------------------------------------------------------------------//
+// Test addressing modes
+
+prfw pldl1strm, p0, [x0, #-32, mul vl]
+// CHECK-INST: prfw pldl1strm, p0, [x0, #-32, mul vl]
+// CHECK-ENCODING: [0x01,0x40,0xe0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 40 e0 85
+
+prfw pldl1strm, p0, [x0, #31, mul vl]
+// CHECK-INST: prfw pldl1strm, p0, [x0, #31, mul vl]
+// CHECK-ENCODING: [0x01,0x40,0xdf,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 01 40 df 85
Modified: llvm/trunk/test/MC/AArch64/basic-a64-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/basic-a64-diagnostics.s?rev=332433&r1=332432&r2=332433&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/basic-a64-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/basic-a64-diagnostics.s Wed May 16 00:50:09 2018
@@ -2476,7 +2476,7 @@
// CHECK-ERROR-NEXT: prfm pldl1strm, [w3, #8]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-AARCH64-NEXT: error: operand specifier not recognised
-// CHECK-ERROR-ARM64-NEXT: error: pre-fetch hint expected
+// CHECK-ERROR-ARM64-NEXT: error: prefetch hint expected
// CHECK-ERROR-NEXT: prfm wibble, [sp]
// CHECK-ERROR-NEXT: ^
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