[PATCH] D43441: [X86][AVX512DQ] Use packed instructions for scalar FP<->i64 conversions on 32-bit targets (PR31630)

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 146972.
craig.topper added a comment.

Use zeros for other elements for fp->int to avoid spurious invalid exceptions. Since these sorts of scalar conversions are common there's a chance someone could notice the spurious exceptions and complain. We seem to have generated the same code in the test cases either way. Since we ultimatley had to load two i32s into an xmm register. We need use a movd/movss that 0 the upper bits anyway.

Also addeded an assert for !Subtarget.is64Bit() to the fp->int conversion. That code is in ReplaceNodeResults is a hook for the type legalizer to legalize the result type so we should only get there when i64 isn't legal.


https://reviews.llvm.org/D43441

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avx512-regcall-NoMask.ll
  test/CodeGen/X86/scalar-fp-to-i64.ll
  test/CodeGen/X86/scalar-int-to-fp.ll

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