[PATCH] D40405: Fix incorrect handling of unsized / void types in SITargetLowering::isLegalAddressingMode

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:679
     // alignment here.
-    if (DL.getTypeStoreSize(Ty) < 4)
+    if (Ty->isSized() && DL.getTypeStoreSize(Ty) < 4)
       return isLegalGlobalAddressingMode(AM);
----------------
rampitec wrote:
> I would prefer to exit earlier than this. It is not address space specific and we hardly can do anything good on a void or opaque type.
... but then it crashes another couple of tests. We seems to be required to process that LSR formulae.


Repository:
  rL LLVM

https://reviews.llvm.org/D40405