[PATCH] D46221: [RISCV] Implement MC layer support for the tail pseudoinstruction

[Mandeep Singh Grang via Phabricator via llvm-commits]

mgrang marked 4 inline comments as done.
mgrang added inline comments.


================
Comment at: lib/Target/RISCV/RISCVInstrInfo.td:666
+// Define AsmString to print "tail" when compile with -S flag.
+let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [X2],
+    isCodeGenOnly = 0 in
----------------
asb wrote:
> Do we actually need Uses = [X2]?
I decided to align this with ARM which has Uses = [SP] in its definition of Tail.


https://reviews.llvm.org/D46221