[llvm] r332265 - [BranchFolding] Allow hoisting to block with a single conditional branch.

Geoff Berry via llvm-commits llvm-commits at lists.llvm.org
Mon May 14 10:31:18 PDT 2018


Author: gberry
Date: Mon May 14 10:31:18 2018
New Revision: 332265

URL: http://llvm.org/viewvc/llvm-project?rev=332265&view=rev
Log:
[BranchFolding] Allow hoisting to block with a single conditional branch.

Summary:
The BranchFolding pass is currently missing opportunities to hoist
common code if the hoisted-to block contains a single conditional branch
that has register uses.  This occurs somewhat frequently on AArch64 with
CBZ/TBZ opcodes.

This change also eliminates some code differences when debug info is
present since the presence of e.g. DBG_VALUE instructions in the
hoisted-to block can enable hoisting that wouldn't have occurred without
them.

Reviewers: MatzeB, rnk, kparzysz, twoh, aprantl, javed.absar

Subscribers: kristof.beyls, JDevlieghere, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D46324

Added:
    llvm/trunk/test/CodeGen/AArch64/branch-folder-oneinst.mir
Modified:
    llvm/trunk/lib/CodeGen/BranchFolding.cpp

Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=332265&r1=332264&r2=332265&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Mon May 14 10:31:18 2018
@@ -1915,8 +1915,12 @@ MachineBasicBlock::iterator findHoisting
 
   if (Uses.empty())
     return Loc;
+  // If the terminator is the only instruction in the block and Uses is not
+  // empty (or we would have returned above), we can still safely hoist
+  // instructions just before the terminator as long as the Defs/Uses are not
+  // violated (which is checked in HoistCommonCodeInSuccs).
   if (Loc == MBB->begin())
-    return MBB->end();
+    return Loc;
 
   // The terminator is probably a conditional branch, try not to separate the
   // branch from condition setting instruction.

Added: llvm/trunk/test/CodeGen/AArch64/branch-folder-oneinst.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/branch-folder-oneinst.mir?rev=332265&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/branch-folder-oneinst.mir (added)
+++ llvm/trunk/test/CodeGen/AArch64/branch-folder-oneinst.mir Mon May 14 10:31:18 2018
@@ -0,0 +1,29 @@
+# RUN: llc -o - %s -mtriple=aarch64 -run-pass branch-folder | FileCheck %s
+# Check that BranchFolding pass is able to hoist a common instruction into a block with a single branch instruction.
+name: func
+tracksRegLiveness: true
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: func
+    ; CHECK-LABEL: bb.0:
+    ; CHECK: $x0 = ADDXri $x0, 1, 0
+    ; CHECK: CBZX $x1, %bb.2
+    liveins: $x1
+    CBZX $x1, %bb.2
+
+  bb.1:
+    ; CHECK-LABEL: bb.1:
+    ; CHECK-NOT: $x0 = ADDXri $x0, 1, 0
+    liveins: $x0
+    $x0 = ADDXri $x0, 1, 0
+    $x0 = ADDXri $x0, 2, 0
+    RET_ReallyLR implicit $x0
+
+  bb.2:
+    ; CHECK-LABEL: bb.2:
+    ; CHECK-NOT: $x0 = ADDXri $x0, 1, 0
+    liveins: $x0
+    $x0 = ADDXri $x0, 1, 0
+    $x0 = ADDXri $x0, 3, 0
+    RET_ReallyLR implicit $x0
+...




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