[lld] r332252 - [ELF][PPC64] Fix getRelExpr for R_PPC64_REL32

Zaara Syeda via llvm-commits llvm-commits at lists.llvm.org
Mon May 14 08:26:44 PDT 2018


Author: syzaara
Date: Mon May 14 08:26:44 2018
New Revision: 332252

URL: http://llvm.org/viewvc/llvm-project?rev=332252&view=rev
Log:
[ELF][PPC64] Fix getRelExpr for R_PPC64_REL32

The relocation R_PPC64_REL32 should return R_PC for getRelExpr since it
computes S + A - P.

Differential Revision: https://reviews.llvm.org/D46586

Modified:
    lld/trunk/ELF/Arch/PPC64.cpp
    lld/trunk/test/ELF/ppc64-relocs.s

Modified: lld/trunk/ELF/Arch/PPC64.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/PPC64.cpp?rev=332252&r1=332251&r2=332252&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/PPC64.cpp (original)
+++ lld/trunk/ELF/Arch/PPC64.cpp Mon May 14 08:26:44 2018
@@ -163,6 +163,7 @@ RelExpr PPC64::getRelExpr(RelType Type,
     return R_PPC_CALL_PLT;
   case R_PPC64_REL16_LO:
   case R_PPC64_REL16_HA:
+  case R_PPC64_REL32:
     return R_PC;
   default:
     return R_ABS;

Modified: lld/trunk/test/ELF/ppc64-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/ppc64-relocs.s?rev=332252&r1=332251&r2=332252&view=diff
==============================================================================
--- lld/trunk/test/ELF/ppc64-relocs.s (original)
+++ lld/trunk/test/ELF/ppc64-relocs.s Mon May 14 08:26:44 2018
@@ -2,11 +2,13 @@
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t
 # RUN: ld.lld %t -o %t2
-# RUN: llvm-objdump -d %t2 | FileCheck %s
+# RUN: llvm-objdump -D %t2 | FileCheck %s --check-prefix=rodataLE
+# RUN: llvm-objdump -D %t2 | FileCheck %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t
 # RUN: ld.lld %t -o %t2
-# RUN: llvm-objdump -d %t2 | FileCheck %s
+# RUN: llvm-objdump -D %t2 | FileCheck %s --check-prefix=rodataBE
+# RUN: llvm-objdump -D %t2 | FileCheck %s
 
 .text
 .global _start
@@ -16,9 +18,16 @@ _start:
 	li      3,42
 	sc
 
-.section        ".toc","aw"
+.section        .rodata,"a", at progbits
+        .p2align        2
+.LJTI0_0:
+        .long   .LBB0_2-.LJTI0_0
+
+.section        .toc,"aw", at progbits
 .L1:
 .quad           22, 37, 89, 47
+.LC0:
+        .tc .LJTI0_0[TC],.LJTI0_0
 
 .section .R_PPC64_TOC16_LO_DS,"ax", at progbits
 .globl .FR_PPC64_TOC16_LO_DS
@@ -130,3 +139,27 @@ _start:
 # CHECK: .FR_PPC64_ADDR16_HIGHESTA:
 # CHECK: 10010038: {{.*}} li 1, 0
 
+.section  .R_PPC64_REL32, "ax", at progbits
+.globl .FR_PPC64_REL32
+.FR_PPC64_REL32:
+  addis 5, 2, .LC0 at toc@ha
+  ld 5, .LC0 at toc@l(5)
+.LBB0_2:
+  add 3, 3, 4
+
+# rodataLE: Disassembly of section .rodata:
+# rodataLE: .rodata:
+# rodataLE: 10000190: b4 fe 00 00
+
+# rodataBE: Disassembly of section .rodata:
+# rodataBE: .rodata:
+# rodataBE: 10000190: 00 00 fe b4
+
+# Address of rodata + value stored at rodata entry
+# should equal address of LBB0_2.
+# 0x10000190 + 0xfeb4 = 0x10010044
+# CHECK: Disassembly of section .R_PPC64_REL32:
+# CHECK: .FR_PPC64_REL32:
+# CHECK: 1001003c: {{.*}} addis 5, 2, -1
+# CHECK: 10010040: {{.*}} ld 5, -32736(5)
+# CHECK: 10010044: {{.*}} add 3, 3, 4




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