[llvm] r332243 - [AggressiveInstCombine] avoid crashing on unsimplified code (PR37446)
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon May 14 06:43:32 PDT 2018
Author: spatel
Date: Mon May 14 06:43:32 2018
New Revision: 332243
URL: http://llvm.org/viewvc/llvm-project?rev=332243&view=rev
Log:
[AggressiveInstCombine] avoid crashing on unsimplified code (PR37446)
This bug:
https://bugs.llvm.org/show_bug.cgi?id=37446
...raises another question: why do we run aggressive-instcombine before
regular instcombine?
Modified:
llvm/trunk/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
llvm/trunk/test/Transforms/AggressiveInstCombine/masked-cmp.ll
Modified: llvm/trunk/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp?rev=332243&r1=332242&r2=332243&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp (original)
+++ llvm/trunk/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp Mon May 14 06:43:32 2018
@@ -108,6 +108,10 @@ static bool matchAndOrChain(Value *V, Ma
if (!MOps.Root)
MOps.Root = Candidate;
+ // The shift constant is out-of-range? This code hasn't been simplified.
+ if (BitIndex >= MOps.Mask.getBitWidth())
+ return false;
+
// Fill in the mask bit derived from the shift constant.
MOps.Mask.setBit(BitIndex);
return MOps.Root == Candidate;
Modified: llvm/trunk/test/Transforms/AggressiveInstCombine/masked-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/AggressiveInstCombine/masked-cmp.ll?rev=332243&r1=332242&r2=332243&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/AggressiveInstCombine/masked-cmp.ll (original)
+++ llvm/trunk/test/Transforms/AggressiveInstCombine/masked-cmp.ll Mon May 14 06:43:32 2018
@@ -217,3 +217,19 @@ define i64 @allset_40_bit_mask(i64 %x) {
ret i64 %a40
}
+; Verify that unsimplified code doesn't crash:
+; https://bugs.llvm.org/show_bug.cgi?id=37446
+
+define i32 @PR37446(i32 %x) {
+; CHECK-LABEL: @PR37446(
+; CHECK-NEXT: [[SHR:%.*]] = lshr i32 1, 33
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHR]], 15
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[AND]], [[X:%.*]]
+; CHECK-NEXT: ret i32 [[AND1]]
+;
+ %shr = lshr i32 1, 33
+ %and = and i32 %shr, 15
+ %and1 = and i32 %and, %x
+ ret i32 %and1
+}
+
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