[llvm] r332204 - [X86] Add fast-isel test cases for _mm_cvtu32_sd, _mm_cvtu64_sd, _mm_cvtu32_ss, and _mm_cvtu64_ss.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun May 13 16:24:20 PDT 2018
Author: ctopper
Date: Sun May 13 16:24:19 2018
New Revision: 332204
URL: http://llvm.org/viewvc/llvm-project?rev=332204&view=rev
Log:
[X86] Add fast-isel test cases for _mm_cvtu32_sd, _mm_cvtu64_sd, _mm_cvtu32_ss, and _mm_cvtu64_ss.
Modified:
llvm/trunk/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
Modified: llvm/trunk/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll?rev=332204&r1=332203&r2=332204&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll Sun May 13 16:24:19 2018
@@ -1985,5 +1985,103 @@ entry:
ret <8 x double> %0
}
+define <2 x double> @test_mm_cvtu32_sd(<2 x double> %__A, i32 %__B) {
+; X32-LABEL: test_mm_cvtu32_sd:
+; X32: # %bb.0: # %entry
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: vcvtusi2sdl %eax, %xmm1, %xmm1
+; X32-NEXT: vmovsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; X32-NEXT: retl
+;
+; X64-LABEL: test_mm_cvtu32_sd:
+; X64: # %bb.0: # %entry
+; X64-NEXT: vcvtusi2sdl %edi, %xmm1, %xmm1
+; X64-NEXT: vmovsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; X64-NEXT: retq
+entry:
+ %conv.i = uitofp i32 %__B to double
+ %vecins.i = insertelement <2 x double> %__A, double %conv.i, i32 0
+ ret <2 x double> %vecins.i
+}
+
+define <2 x double> @test_mm_cvtu64_sd(<2 x double> %__A, i64 %__B) {
+; X32-LABEL: test_mm_cvtu64_sd:
+; X32: # %bb.0: # %entry
+; X32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1
+; X32-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
+; X32-NEXT: vsubpd {{\.LCPI.*}}, %xmm1, %xmm1
+; X32-NEXT: vhaddpd %xmm1, %xmm1, %xmm1
+; X32-NEXT: vmovsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; X32-NEXT: retl
+;
+; X64-LABEL: test_mm_cvtu64_sd:
+; X64: # %bb.0: # %entry
+; X64-NEXT: vcvtusi2sdq %rdi, %xmm1, %xmm1
+; X64-NEXT: vmovsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; X64-NEXT: retq
+entry:
+ %conv.i = uitofp i64 %__B to double
+ %vecins.i = insertelement <2 x double> %__A, double %conv.i, i32 0
+ ret <2 x double> %vecins.i
+}
+
+define <4 x float> @test_mm_cvtu32_ss(<4 x float> %__A, i32 %__B) {
+; X32-LABEL: test_mm_cvtu32_ss:
+; X32: # %bb.0: # %entry
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: vcvtusi2ssl %eax, %xmm1, %xmm1
+; X32-NEXT: vmovss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; X32-NEXT: retl
+;
+; X64-LABEL: test_mm_cvtu32_ss:
+; X64: # %bb.0: # %entry
+; X64-NEXT: vcvtusi2ssl %edi, %xmm1, %xmm1
+; X64-NEXT: vmovss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; X64-NEXT: retq
+entry:
+ %conv.i = uitofp i32 %__B to float
+ %vecins.i = insertelement <4 x float> %__A, float %conv.i, i32 0
+ ret <4 x float> %vecins.i
+}
+
+define <4 x float> @test_mm_cvtu64_ss(<4 x float> %__A, i64 %__B) {
+; X32-LABEL: test_mm_cvtu64_ss:
+; X32: # %bb.0: # %entry
+; X32-NEXT: pushl %ebp
+; X32-NEXT: .cfi_def_cfa_offset 8
+; X32-NEXT: .cfi_offset %ebp, -8
+; X32-NEXT: movl %esp, %ebp
+; X32-NEXT: .cfi_def_cfa_register %ebp
+; X32-NEXT: andl $-8, %esp
+; X32-NEXT: subl $16, %esp
+; X32-NEXT: movl 12(%ebp), %eax
+; X32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X32-NEXT: vpinsrd $1, %eax, %xmm1, %xmm1
+; X32-NEXT: vmovq %xmm1, {{[0-9]+}}(%esp)
+; X32-NEXT: xorl %ecx, %ecx
+; X32-NEXT: testl %eax, %eax
+; X32-NEXT: setns %cl
+; X32-NEXT: fildll {{[0-9]+}}(%esp)
+; X32-NEXT: fadds {{\.LCPI.*}}(,%ecx,4)
+; X32-NEXT: fstps {{[0-9]+}}(%esp)
+; X32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X32-NEXT: vmovss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; X32-NEXT: movl %ebp, %esp
+; X32-NEXT: popl %ebp
+; X32-NEXT: .cfi_def_cfa %esp, 4
+; X32-NEXT: retl
+;
+; X64-LABEL: test_mm_cvtu64_ss:
+; X64: # %bb.0: # %entry
+; X64-NEXT: vcvtusi2ssq %rdi, %xmm1, %xmm1
+; X64-NEXT: vmovss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; X64-NEXT: retq
+entry:
+ %conv.i = uitofp i64 %__B to float
+ %vecins.i = insertelement <4 x float> %__A, float %conv.i, i32 0
+ ret <4 x float> %vecins.i
+}
+
!0 = !{i32 1}
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