[PATCH] D46811: AMDGPU: Don't force the IEEE bit for Mesa compute shaders.
Bas Nieuwenhuizen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun May 13 12:50:39 PDT 2018
bnieuwenhuizen created this revision.
bnieuwenhuizen added reviewers: arsenm, nhaehnle.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, kzhuravl.
Neither GL nor Vulkan have any requirements on signaling/quiet
NaNs.
Repository:
rL LLVM
https://reviews.llvm.org/D46811
Files:
lib/Target/AMDGPU/AMDGPUSubtarget.h
Index: lib/Target/AMDGPU/AMDGPUSubtarget.h
===================================================================
--- lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -413,7 +413,7 @@
}
bool enableIEEEBit(const MachineFunction &MF) const {
- return AMDGPU::isCompute(MF.getFunction().getCallingConv());
+ return !AMDGPU::isShader(MF.getFunction().getCallingConv());
}
bool useFlatForGlobal() const {
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D46811.146525.patch
Type: text/x-patch
Size: 449 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180513/b70b1629/attachment.bin>
More information about the llvm-commits
mailing list